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Ponencia
On the AER Convolution Processors for FPGA
(IEEE Computer Society, 2010)
Image convolution operations in digital computer systems are usually very expensive operations in terms of resource consumption (processor resources and processing time) for an efficient Real-Time application. In these ...
Ponencia
FPGA Implementations Comparison of Neuro-cortical Inspired Convolution Processors for Spiking Systems
(Springer, 2009)
Image convolution operations in digital computer systems are usually very expensive operations in terms of resource consumption (processor resources and processing time) for an efficient Real-Time application. In ...
Ponencia
Spike Processing on an Embedded Multi-task Computer: Image Reconstruction
(IEEE Computer Society, 2007)
There is an emerging philosophy, called Neuro-informatics, contained in the Artificial Intelligence field, that aims to emulate how living beings do tasks such as taking a decision based on the interpretation of an image ...
Ponencia
Address-Event based Platform for Bio-inspired Spiking Systems
(SPIE Digital LIbrary, 2007-05)
Address Event Representation (AER) is an emergent neuromorphic interchip communication protocol that allows a real-time virtual massive connectivity between huge number neurons, located on different chips. By exploiting ...
Ponencia
Neuro-Inspired Real-Time USB & PCI to AER Interfaces for Vision Processing
(IEEE, 2008-06)
Address-Event-Representation (AER) is an emergent neuromorphic interchip communication protocol that allows for real-time virtual massive connectivity between huge number neurons located on different chips. By exploiting ...
Ponencia
AER-based robotic closed-loop control system
(IEEE Computer Society, 2008)
Address-Event-Representation (AER) is an asynchronous protocol for transferring the information of spiking neuro-inspired systems. Actually AER systems are able to see, to ear, to process information, and to learn. ...