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Ponencia
CMOS design of chaotic oscillators using state variables: a monolithic Chua's circuit
(Institute of Electrical and Electronics Engineers, 1993)
This paper presents design considerations for monolithic implementation of piecewise-linear (PWL) dynamic systems in CMOS technology. Starting from a review of available CMOS circuit primitives and their respective merits ...
Ponencia
A Tool for automated design of sigma-delta modulators using statistical optimization
(Institute of Electrical and Electronics Engineers, 1993)
A tool is presented which starting from high level specifications of SC σδ modulators (resolution, bandwidth and oversampling ratio) calculates first optimum specifications for the building blocks (op-amps, comparator, ...
Artículo
Nonlinear switched-current CMOS IC for random signal generation
(Institution of Engineering and Technology, 1993)
A nonlinear switched-current circuit is presented that implements a chaotic algorithm for the generation of broadband, white analogue noise. The circuit has been fabricated in a double-metal, single-poly 1.6µm CMOS technology ...
Artículo
Current-Mode Techniques for the Implementation of Continuous- and Discrete-Time Cellular Neural Networks
(Institute of Electrical and Electronics Engineers, 1993)
This paper presents a unified, comprehensive approach to the design of continuous-time (CT) and discrete-time (DT) cellular neural networks (CNN) using CMOS current-mode analog techniques. The net input signals are ...
Ponencia
A Model for VLSI implementation of CNN image processing chips using current-mode techniques
(Institute of Electrical and Electronics Engineers, 1993)
A new Cellular Neural Network model is proposed which allows simpler and faster VLSI implementation than previous models. Current-mode building blocks are presented for the design of CMOS image preprocessing chips (feature ...
Artículo
A CMOS analog adaptive BAM with on-chip learning and weight refreshing
(Institute of Electrical and Electronics Engineers, 1993)
In this paper we will extend the transconductance-mode (T-mode) approach [1] to implement analog continuous-time neural network hardware systems to include on-chip Hebbian learning and on-chip analog weight storage capability. ...