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Mostrando ítems 1-10 de 23
Ponencia
A mixed-signal early vision chip with embedded image and programming memories and digital I/O
(The International Society for Optical Engineering - SPIE, 2003)
From a system level perspective, this paper presents a 128 × 128 flexible and reconfigurable Focal-Plane Analog Programmable Array Processor, which has been designed as a single chip in a 0.35μm standard digital 1P-5M CMOS ...
Ponencia
Structure reconfigurability of the CNNUC3 for robust template operation
(Institute of Electrical and Electronics Engineers, 2000)
We demonstrate the importance of the reconfigurability of a 64/spl times/64 cells size CNN-UM chip. As we show, in such a high complexity mixed-signal VLSI circuit the switch and internal reference level reconfigurability ...
Artículo
A 1000 FPS at 128×128 vision processor with 8-bit digitized I/O
(Institute of Electrical and Electronics Engineers, 2004)
This paper presents a mixed-signal programmable chip for high-speed vision applications. It consists of an array of processing elements, arranged to operate in accordance with the principles of single instruction multiple ...
Ponencia
Analog weight buffering strategy for CNN chips
(Institute of Electrical and Electronics Engineers, 2003)
Large, gray-scale CNN chips employ analog signals to achieve high-density in the internal distribution of the template parameters. Despite the design strategies adopted at the circuitry employed to implement the weights, ...
Ponencia
Bio-inspired analog parallel array processor chip with programmable spatio-temporal dynamics
(Institute of Electrical and Electronics Engineers, 2002)
A bio-inspired model for an analog parallel array processor (APAP), based on studies on the vertebrate retina, permits the realization of complex spatio-temporal dynamics in VLSI. This model mimics the way in which images ...
Artículo
Second-order neural core for bioinspired focal-plane dynamic image processing in CMOS
(Institute of Electrical and Electronics Engineers, 2004)
Based on studies of the mammalian retina, a bioinspired model for mixed-signal array processing has been implemented on silicon. This model mimics the way in which images are processed at the front-end of natural visual ...
Artículo
A Bio-Inspired Two-Layer Mixed-Signal Flexible Programmable Chip for Early Vision
(Institute of Electrical and Electronics Engineers, 2003)
A bio-inspired model for an analog programmable array processor (APAP), based on studies on the vertebrate retina, has permitted the realization of complex programmable spatio-temporal dynamics in VLSI. This model mimics ...
Ponencia
Object oriented image segmentation on the CNNUC3 chip
(Institute of Electrical and Electronics Engineers, 2000)
We show how a complex object oriented image analysis algorithm can be implemented on a CNNUM chip for video-coding. Besides the applied linear operations, several gray-scale nonlinear template operations are also emulated ...
Ponencia
CMOS Architectures and circuits for high-speed decision-making from image flows
(The International Society for Optical Engineering (SPIE), 2008)
We present architectures, CMOS circuits and CMOS chips to process image flows at very high speed. This is achieved by exploiting bio-inspiration and performing processing tasks in parallel manner and concurrently with image ...
Ponencia
A versatile sensor interface for programmable vision systems-on-chip
(The International Society for Optical Engineering - SPIE, 2003)
This paper describes an optical sensor interface designed for a programmable mixed-signal vision chip. This chip has been designed and manufactured in a standard 0.35μm n-well CMOS technology with one poly layer and five ...