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Mostrando ítems 1-5 de 5
Ponencia
A Sub-µW Reconfigurable Front-End for Invasive Neural Recording
(Institute of Electrical and Electronics Engineers, 2019)
This paper presents a sub-μW ac-coupled reconfigurable front-end for the purpose of neural recording. The proposed topology embeds in it filtering capabilities allowing it to select among different frequency bands inside ...
Ponencia
A High TCMRR, Inherently Charge Balanced Bidirectional Front-End for Multichannel Closed-Loop Neuromodulation
(Institute of Electrical and Electronics Engineers, 2019)
This paper describes a multichannel bidirectional front-end for implantable closed-loop neuromodulation. Stimulation artefacts are reduced by way of a 4-channel H-bridge current source sharing stimulator front-end that ...
Ponencia
Mixed-signal quadratic operators for the feature extraction of neural signals
(Institute of Electrical and Electronics Engineers, 2016)
This paper presents design principles for reusing charge-redistribution SAR ADCs as digital multipliers. This is illustrated with an 8-b fully-differential rail-to-rail SAR ADC/multiplier, designed in a 180 nm HV CMOS ...
Ponencia
A 76nW, 4kS/s 10-bit SAR ADC with offset cancellation for biomedical applications
(Institute of Electrical and Electronics Engineers, 2016)
This paper presents a 10-bit fully-differential rail-to-rail successive approximation (SAR) ADC designed for biomedical applications. The ADC, fabricated in a 180nm HV CMOS technology, features low switching energy consumption ...
Artículo
Offset-calibration with Time-Domain Comparators Using Inversion-mode Varactors
(Institute of Electrical and Electronics Engineers, 2019)
This paper presents a differential time-domain comparator formed by two voltage controlled delay lines, one per input terminal, and a binary phase detector for comparison solving. The propagation delay through the respective ...