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Mostrando ítems 1-6 de 6
Artículo
A 1.5 ns OFF/ON Switching-Time Voltage-Mode LVDS Driver/Receiver Pair for Asynchronous AER Bit-Serial Chip Grid Links With Up to 40 Times Event-Rate Dependent Power Savings
(IEEE Computer Society, 2013)
This paper presents a low power fast ON/OFF switchable voltage mode implementation of a driver/receiver pair intended to be used in high speed bit-serial Low Voltage Differential Signaling (LVDS) Address Event ...
Artículo
A 32 x 32 Pixel Convolution Processor Chip for Address Event Vision Sensors With 155 ns Event Latency and 20 Meps Throughput
(IEEE Computer Society, 2011)
This paper describes a convolution chip for event-driven vision sensing and processing systems. As opposed to conventional frame-constraint vision systems, in event-driven vision there is no need for frames. In frame-free ...
Ponencia
An Intrinsic Method for Fast Parameter Update on the SpiNNaker Platform
(IEEE Computer Society, 2018)
Neuromorphic Computing or Spiking (also called Event-Driven) Neural Systems are becoming of high interest as they potentially allow for lower power hardware computing platforms, where power consumption is data driven. ...
Ponencia
Event based vision sensing and processing
(IEEE Computer Society, 2008)
In this paper we briefly summarize the fundamental properties of spike events processing applied to artificial vision systems. This sensing and processing technology is capable of very high speed throughput, because it ...
Ponencia
Event-driven stereo vision with orientation filters
(IEEE Computer Society, 2014)
The recently developed Dynamic Vision Sensors (DVS) sense dynamic visual information asynchronously and code it into trains of events with sub-micro second temporal resolution. This high temporal precision makes the ...
Artículo
An Instant-Startup Jitter-Tolerant Manchester- Encoding Serializer/Deserializer Scheme for Event-Driven Bit-Serial LVDS Interchip AER Links
(IEEE Computer Society, 2011)
This paper presents a serializer/deserializer scheme for asynchronous address event representation (AER) bit-serial interchip communications. Each serial AER (sAER) link uses four wires: a micro strip pair for low voltage ...