Now showing items 1-20 of 54

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      A 12-bit@40MS/s Gm-C Cascade 3-2 Continuous-Time Sigma-Delta Modulator  [Presentation]

      Tortosa Navas, Ramón; Aceituno, Antonio; Rosa Utrera, José Manuel de la; Rodríguez Vázquez, Ángel Benito; Fernández Fernández, Francisco Vidal (Institute of Electrical and Electronics Engineers, 2007)
      This paper reports the transistor-level design of a 130-nm CMOS continuous-time cascade ΣΔ modulator. The modulator topology, directly synthesized in the continuous-time domain, consists of a third-order stage followed by ...
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      A design tool for high-resolution high-frequency cascade continuous- time Σ∆ modulators  [Article]

      Tortosa Navas, Ramón; Castro López, Rafael; Rosa Utrera, José Manuel de la; Rodríguez Vázquez, Ángel Benito; Fernández Fernández, Francisco Vidal (SPIE, 2007)
      This paper introduces a CAD methodology to assist the de signer in the implementation of continuous-time (CT) cas- cade Σ∆ modulators. The salient features of this methodology ar e: (a) flexible behavioral modeling ...
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      A Direct Synthesis Method of Cascaded Continuous-Time Sigma-Delta Modulators  [Presentation]

      Tortosa Navas, Ramón; Rosa Utrera, José Manuel de la; Rodríguez Vázquez, Ángel Benito; Fernández Fernández, Francisco Vidal (2005)
      This paper presents an efficient method to synthesize cascaded sigma-delta modulators implemented with continuous-time circuits. It is based on the direct synthesis of the whole cascaded architecture in the continuous-time ...
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      A Family of matroid intersection algorithms for the computation of approximated symbolic network functions  [Presentation]

      Wambacq, Piet; Fernández Fernández, Francisco Vidal; Gièlen, Georges G.E.; Sansen, Willy M.C.; Rodríguez Vázquez, Ángel Benito (Institute of Electrical and Electronics Engineers, 1996)
      In recent years, the technique of simplification during generation has turned out to be very promising for the efficient computation of approximate symbolic network functions for large transistor circuits. In this paper ...
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      A hierarchical approach for the symbolic analysis of large analog integrated circuits  [Presentation]

      Guerra Vinuesa, Oscar; Roca Moreno, Elisenda; Fernández Fernández, Francisco Vidal; Rodríguez Vázquez, Ángel Benito (IEEE computer society digital library, 2000)
      This paper introduces a new hierarchical analysis methodology which incorporates approximation strategies during the analysis process. Consequently, the circuit sizes that can be analyzed increase dramatically, ...
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      A new high-level synthesis methodology of cascaded continuous-time ΣΔ modulators  [Article]

      Tortosa Navas, Ramón; Rosa Utrera, José Manuel de la; Fernández Fernández, Francisco Vidal; Rodríguez Vázquez, Ángel Benito (Institute of Electrical and Electronics Engineers, 2006)
      This brief presents an efficient method for synthesizing cascaded sigma–delta modulators implemented with continuous-time circuits. It is based on the direct synthesis of the whole cascaded architecture in the continuous-time ...
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      A Reuse-based framework for the design of analog and mixed-signal ICs  [Presentation]

      Castro López, Rafael; Fernández Fernández, Francisco Vidal; Rodríguez Vázquez, Ángel Benito (The International Society for Optical Engineering -SPIE, 2005)
      Despite the spectacular breakthroughs of the semiconductor industry, the ability to design integrated circuits (ICs) under stringent time-to-market (TTM) requirements is lagging behind integration capacity, so far keeping ...
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      A versatile CMOS transistor array IC for the statistical characterization of time-zero variability, RTN, BTI, and HCI  [Article]

      Díaz Fortuny, Javier; Martín Martínez, Javier; Rodríguez Martínez, Rosana; Castro López, Rafael; Roca Moreno, Elisenda; Fernández Fernández, Francisco Vidal; Aragonès Cervera, Xavier; Barajas Ojeda, Enrique; Mateo Peña, Diego; Nafría Maqueda, Montserrat (Institute of Electrical and Electronics Engineers (IEEE), 2018-01-01)
      Statistical characterization of CMOS transistor variability phenomena in modern nanometer technologies is key for accurate end-of-life prediction. This paper presents a novel CMOS transistor array chip to statistically ...
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      Accurate VHDL-based simulation of /spl Sigma//spl Delta/ modulators  [Presentation]

      Castro López, Rafael; Fernández Fernández, Francisco Vidal; Medeiro Hidalgo, Fernando; Rodríguez Vázquez, Ángel Benito (Institute of Electrical and Electronics Engineers, 2003)
      The computational cost of transient simulation of /spl Sigma//spl Delta/ modulators (/spl Sigma//spl Delta/Ms) at the electrical level is prohibitively high. Behavioral simulation techniques offer a promising solution to ...
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      Algorithm for efficient symbolic analysis of large analogue circuits  [Article]

      Wambacq, Piet; Gièlen, Georges G.E.; Sansen, Willy M.C.; Rodríguez Vázquez, Ángel Benito; Fernández Fernández, Francisco Vidal (Institution of Engineering and Technology, 1994)
      An algorithm is presented that generates simplified symbolic expressions for the small-signal characteristics of large analogue circuits. The expressions are approximated while they are computed, so that only the most ...
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      AMS/RF-CMOS circuit design for wireless transceivers  [Article]

      Castro López, Rafael; Rodríguez de Llera, Delia; Ismail, Mohammed; Fernández Fernández, Francisco Vidal (Elsevier, 2009)
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      An accurate error control mechanism for simplification before generation algorithms  [Presentation]

      Guerra Vinuesa, Oscar; Rodríguez García, Juan D.; Roca Moreno, Elisenda; Fernández Fernández, Francisco Vidal; Rodríguez Vázquez, Ángel Benito (Institute of Electrical and Electronics Engineers, 1999)
      The use of simplification before generation techniques to enable the approximate symbolic analysis of large analog circuits is discussed. This paper introduces an error control mechanism to drive the circuit reduction, ...
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      An advanced symbolic analyzer for the automatic generation of analog circuit design equations  [Presentation]

      Fernández Fernández, Francisco Vidal; Rodríguez Vázquez, Ángel Benito; Huertas Díaz, José Luis (Institute of Electrical and Electronics Engineers, 1991)
      A tool for symbolic analysis of analog integrated circuits is presented featuring accurate simplification, pole/zero extraction, and tools for parametric AC circuit characterization. The program, called ASAP, uses signal ...
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      An algorithm for numerical reference generation in symbolic analysis of large analog circuits  [Presentation]

      García Vargas, Ignacio; Galán, Mariano; Fernández Fernández, Francisco Vidal; Rodríguez Vázquez, Ángel Benito (Institute of Electrical and Electronics Engineers, 1997)
      This paper addresses the problems arising in the calculation of numerical references (network function coefficients), essential for an appropriate error control in simplification before and during generation algorithms for ...
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      An automated design methodology of RF circuits by using Pareto-optimal fronts of EMsimulated inductors  [Article]

      González Echevarría, Reinier; Roca Moreno, Elisenda; Castro López, Rafael; Fernández Fernández, Francisco Vidal; Sieiro, J.; López Villegas, J. M.; Vidal, N. (Institute of Electrical and Electronics Engineers, 2017)
      A new design methodology for radiofrequency circuits is presented that includes electromagnetic (EM) simulation of the inductors into the optimization flow. This is achieved by previously generating the Pareto-optimal front ...
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      An error-controlled methodology for approximate hierarchical symbolic analysis  [Presentation]

      Guerra Vinuesa, Oscar; Rodríguez García, Juan D.; Roca Moreno, Elisenda; Fernández Fernández, Francisco Vidal; Rodríguez Vázquez, Ángel Benito (Institute of Electrical and Electronics Engineers, 2000)
      Limitations of existing approaches for symbolic analysis of large analog circuits are discussed. To address their solution, a new methodology for hierarchical symbolic analysis is introduced. The combination of a hierarchical ...
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      An Optimization-based Tool for the High-Level Synthesis of Discrete-time and continuous-Time Sigma-Delta Modulators in the MATLAB/SIMULINK Environment  [Presentation]

      Ruiz Amaya, Jesús; Rosa Utrera, José Manuel de la; Medeiro Hidalgo, Fernando; Fernández Fernández, Francisco Vidal; Río Fernández, Rocío del; Pérez Verdú, Belén; Rodríguez Vázquez, Ángel Benito (Institute of Electrical and Electronics Engineers, 2004)
      This paper presents a MATLAB toolbox for the automated high-level sizing of ΣΔ Modulators (ΣΔMs) based on the combination of an accurate time-domain behavioural simulator and a statistical optimizer. The implementation on ...
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      Analog and mixed-signal IC design and design methodologies  [Article]

      Fernández Fernández, Francisco Vidal (Elsevier, 2003)
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      Analysis of Clock Jitter Error in Multibit Continuous-Time ΣΔ modulators with NRZ Feedback Waveform  [Presentation]

      Tortosa Navas, Ramón; Rosa Utrera, José Manuel de la; Rodríguez Vázquez, Ángel Benito; Fernández Fernández, Francisco Vidal (Institute of Electrical and Electronics Engineers, 2005)
      This paper presents a detailed study of the clock jitter error in multibit continuous-time ΣΔ modulators with non-return-to-zero feedback waveform. Closed-form expressions are derived for the in-band error power and the ...
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      Una aproximación multinivel para el diseño sistemático de circuitos integrados de radiofrecuencia.  [PhD Thesis]

      Moreira de Passos, Fabio (2018-04-13)
      En un mercado bien establecido como el de las telecomunicaciones, donde se está evolucionando hacia el 5G, se estima que hoy en día haya más de 2 Mil Millones de usuarios de Smartphones. Solo de por sí, este número es ...