Artículo
Fast-Convergence Microsecond-Accurate Clock Discipline Algorithm for Hardware Implementation
Autor/es | Viejo Cortés, Julián
Juan Chico, Jorge Bellido Díaz, Manuel Jesús Millán Calderón, Alejandro Ruiz de Clavijo Vázquez, Paulino |
Departamento | Universidad de Sevilla. Departamento de Tecnología Electrónica |
Fecha de publicación | 2011 |
Fecha de depósito | 2017-01-25 |
Publicado en |
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Resumen | Discrete microprocessor-based equipment is a typical synchronization
system on the market which implements the most critical
features of the synchronization protocols in hardware and the synchronization
algorithms in ... Discrete microprocessor-based equipment is a typical synchronization system on the market which implements the most critical features of the synchronization protocols in hardware and the synchronization algorithms in software. In this paper, a new clock discipline algorithm for hardware implementation is presented, allowing for full hardware implementation of synchronization systems. Measurements on field-programmable gate array prototypes show a fast convergence time (below 10 s) and a high accuracy (1 μs) for typical configuration parameters. |
Agencias financiadoras | Ministerio de Educación y Cultura (MEC). España |
Identificador del proyecto | HIPER TEC2007-61802/MIC |
Cita | Viejo Cortés, J., Juan Chico, J., Bellido Díaz, M.J., Millán Calderón, A. y Ruiz de Clavijo Vázquez, P. (2011). Fast-Convergence Microsecond-Accurate Clock Discipline Algorithm for Hardware Implementation. IEEE Transactions on Instrumentation and Measurement, 60 (12), 3961-3963. |
Ficheros | Tamaño | Formato | Ver | Descripción |
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Fast convergence.pdf | 267.7Kb | [PDF] | Ver/ | |