Ponencia
New high performance second generation CMOS current conveyor
Autor/es | Marri, Swathi
Ramírez Angulo, Jaime López Martín, Antonio González Carvajal, Ramón |
Departamento | Universidad de Sevilla. Departamento de Ingeniería Electrónica |
Fecha de publicación | 2009 |
Fecha de depósito | 2015-03-12 |
Publicado en |
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Resumen | A new high performance second-generation CMOS
current conveyor architecture is presented. It is built using a
differential flipped voltage follower as its input buffer stage and
a cascode current mirror as output stage. ... A new high performance second-generation CMOS current conveyor architecture is presented. It is built using a differential flipped voltage follower as its input buffer stage and a cascode current mirror as output stage. It is characterized by very low output impedance. It provides gain independent high bandwidth when used to implement a programmable gain voltage amplifier. Simulation and experimental results in AMI 0.5µm CMOS technology are provided to validate the characteristics of the design. |
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