Hardware Implementation of Convolutional STDP for On-line Visual Feature Learning

Yousefzadeh, Amirreza; Masquelier, T.; Serrano Gotarredona, María Teresa; Linares Barranco, Bernabé

doi:10.1109/ISCAS.2017.8050870

Ponencia

dc.creator	Yousefzadeh, Amirreza	es
dc.creator	Masquelier, T.	es
dc.creator	Serrano Gotarredona, María Teresa	es
dc.creator	Linares Barranco, Bernabé	es
dc.date.accessioned	2020-07-08T12:03:47Z
dc.date.available	2020-07-08T12:03:47Z
dc.date.issued	2017
dc.identifier.citation	Yousefzadeh, A., Masquelier, T., Serrano Gotarredona, M.T. y Linares Barranco, B. (2017). Hardware Implementation of Convolutional STDP for On-line Visual Feature Learning. En ISCAS 2017. IEEE International Symposium on Circuits and Systems (1-5), Baltimore (USA): IEEE. Institute of Electrical and Electronics Engineers.
dc.identifier.issn	2379-447X	es
dc.identifier.uri	https://hdl.handle.net/11441/99045
dc.description.abstract	We present a highly hardware friendly STDP (Spike Timing Dependent Plasticity) learning rule for training Spiking Convolutional Cores in Unsupervised mode and training Fully Connected Classifiers in Supervised Mode. Examples are given for a 2-layer Spiking Neural System which learns in real time features from visual scenes obtained with spiking DVS (Dynamic Vision Sensor) Cameras.	es
dc.description.sponsorship	EU H2020 grant 644096 “ECOMODE”	es
dc.description.sponsorship	EU H2020 grant 687299 “NEURAM3”	es
dc.description.sponsorship	Ministry of Economy and Competitivity (Spain) /European Regional Development Fund TEC2012-37868-C04-01 (BIOSENSE)	es
dc.description.sponsorship	Junta de Andalucía (España) TIC-6091 (NANONEURO)	es
dc.format	application/pdf	es
dc.format.extent	5 p.	es
dc.language.iso	eng	es
dc.publisher	IEEE. Institute of Electrical and Electronics Engineers	es
dc.relation.ispartof	ISCAS 2017. IEEE International Symposium on Circuits and Systems (2017), p 1-5
dc.rights	Attribution-NonCommercial-NoDerivatives 4.0 Internacional	*
dc.rights.uri	http://creativecommons.org/licenses/by-nc-nd/4.0/	*
dc.subject	Neuromorphic Systems	es
dc.subject	Spike Time Dependent Plasticity (STDP)	es
dc.subject	Spiking Neural Networks	es
dc.subject	Hardware Implementation of Neural Systems	es
dc.subject	Learning Systems	es
dc.title	Hardware Implementation of Convolutional STDP for On-line Visual Feature Learning	es
dc.type	info:eu-repo/semantics/conferenceObject	es
dcterms.identifier	https://ror.org/03yxnpp24
dc.type.version	info:eu-repo/semantics/publishedVersion	es
dc.rights.accessRights	info:eu-repo/semantics/openAccess	es
dc.contributor.affiliation	Universidad de Sevilla. Departamento de Arquitectura y Tecnología de Computadores	es
dc.relation.projectID	644096 “ECOMODE”	es
dc.relation.projectID	687299 “NEURAM3”	es
dc.relation.projectID	TEC2012-37868-C04-01 (BIOSENSE)	es
dc.relation.projectID	TIC-6091 (NANONEURO)	es
dc.relation.publisherversion	https://ieeexplore.ieee.org/document/8050870	es
dc.identifier.doi	10.1109/ISCAS.2017.8050870	es
dc.contributor.group	Universidad de Sevilla. TIC178: Diseño y Test de Circuitos Integrados de Señal Mixta	es
dc.publication.initialPage	1	es
dc.publication.endPage	5	es
dc.eventtitle	ISCAS 2017. IEEE International Symposium on Circuits and Systems	es
dc.eventinstitution	Baltimore (USA)	es

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