Ponencia
On simplification techniques for symbolic analysis of analog integrated circuits
Autor/es | Fernández Fernández, Francisco Vidal
Martín, J. D. Rodríguez Vázquez, Ángel Benito Huertas Díaz, José Luis |
Departamento | Universidad de Sevilla. Departamento de Electrónica y Electromagnetismo |
Fecha de publicación | 1992 |
Fecha de depósito | 2020-03-16 |
Publicado en |
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ISBN/ISSN | 0-7803-0593-0 0271-4310 |
Resumen | This paper addresses the topic of formula simplification for symbolic analyzers. Previously reported criteria for flat analysis approaches are briefly reviewed and their limitations illustrated via examples of practical ... This paper addresses the topic of formula simplification for symbolic analyzers. Previously reported criteria for flat analysis approaches are briefly reviewed and their limitations illustrated via examples of practical circuits. An adaptive simplification method using pole/zero monitoring for error control is given to alleviate some of these problems. Then a new simplification strategy is presented which takes into account potential ranges of variation of the different symbolic parameters and which overcomes the drawbacks of previous criteria. An algorithm for the approximation of symbolic formula obtained via hierarchical symbolic analysis approaches is also outlined. |
Cita | Fernández Fernández, F.V., Martín, J.D., Rodríguez Vázquez, Á.B. y Huertas Díaz, J.L. (1992). On simplification techniques for symbolic analysis of analog integrated circuits. En IEEE International Symposium on Circuits and Systems (1149-1152), San Diego, USA: Institute of Electrical and Electronics Engineers. |
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