Modular analog continuous-time VLSI neural networks with on chip hebbian learning and analog storage

Abstract

A modular analog circuit design approach for hardware implementations of neural networks is presented. This approach is based on the use of small transconductance multipliers as the main component, and is therefore called the T-mode (Transconductance-mode) approach. This circuit design technique will be used to design a set of modular chips, which will be assembled to build either BAM networks, Hopfield networks, Winner-Take-All networks, or simplified ART1 networks. The approach will be extended afterwards in order to include a hebbian learning rule into each synapse. As an example, a learning BAM network system will be shown. The experimental results given were obtained from 2|im CMOS double-metal doublepolysilicon (MOSIS) prototypes.