Ponencia
An AER handshake-less modular infrastructure PCB with x8 2.5Gbps LVDS serial links
Autor/es | Iakymchuk, T.
Rosado, A. Serrano Gotarredona, María Teresa Linares Barranco, Bernabé Jiménez Fernández, Ángel Francisco Linares Barranco, Alejandro Jiménez Moreno, Gabriel |
Departamento | Universidad de Sevilla. Departamento de Arquitectura y Tecnología de Computadores |
Fecha de publicación | 2014 |
Fecha de depósito | 2019-12-26 |
Publicado en |
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ISBN/ISSN | 978-1-4799-3432-4 0271-4302 |
Resumen | Nowadays spike-based brain processing emulation is
taking off. Several EU and others worldwide projects are
demonstrating this, like SpiNNaker, BrainScaleS, FACETS, or
NeuroGrid. The larger the brain process emulation ... Nowadays spike-based brain processing emulation is taking off. Several EU and others worldwide projects are demonstrating this, like SpiNNaker, BrainScaleS, FACETS, or NeuroGrid. The larger the brain process emulation on silicon is, the higher the communication performance of the hosting platforms has to be. Many times the bottleneck of these system implementations is not on the performance inside a chip or a board, but in the communication between boards. This paper describes a novel modular Address-Event-Representation (AER) FPGA-based (Spartan6) infrastructure PCB (the AER-Node board) with 2.5Gbps LVDS high speed serial links over SATA cables that offers a peak performance of 32-bit 62.5Meps (Mega events per second) on board-to-board communications. The board allows back compatibility with parallel AER devices supporting up to x2 28-bit parallel data with asynchronous handshake. These boards also allow modular expansion functionality through several daughter boards. The paper is focused on describing in detail the LVDS serial interface and presenting its performance. |
Identificador del proyecto | TEC2009-10639-C04-02/01
TEC2012-37868-C04-02/01 TIC-6091 PRI-PIMCHI-2011-0768 |
Cita | Iakymchuk, T., Rosado, A., Serrano Gotarredona, T., Linares Barranco, B., Jiménez Fernández, Á.F., Linares Barranco, A. y Jiménez Moreno, G. (2014). An AER handshake-less modular infrastructure PCB with x8 2.5Gbps LVDS serial links. En ISCAS 2014: IEEE International Symposium on Circuits and Systems (1556-1559), Melbourne VIC, Australia: IEEE Computer Society. |
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