Ponencia
On the AER Convolution Processors for FPGA
Autor/es | Linares Barranco, Alejandro
Paz Vicente, Rafael Gómez Rodríguez, Francisco de Asís Jiménez Fernández, Ángel Francisco Rivas Pérez, Manuel Jiménez Moreno, Gabriel Civit Balcells, Antón |
Departamento | Universidad de Sevilla. Departamento de Arquitectura y Tecnología de Computadores |
Fecha de publicación | 2010 |
Fecha de depósito | 2019-12-18 |
Publicado en |
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ISBN/ISSN | 978-1-4244-5308-5 0271-4302 |
Resumen | Image convolution operations in digital computer
systems are usually very expensive operations in terms of
resource consumption (processor resources and processing time)
for an efficient Real-Time application. In these ... Image convolution operations in digital computer systems are usually very expensive operations in terms of resource consumption (processor resources and processing time) for an efficient Real-Time application. In these scenarios the visual information is divided into frames and each one has to be completely processed before the next frame arrives in order to warranty the real-time. A spike-based philosophy for computing convolutions based on the neuro-inspired Address-Event- Representation (AER) is achieving high performances. In this paper we present two FPGA implementations of AER-based convolution processors for relatively small Xilinx FPGAs (Spartan-II 200 and Spartan-3 400), which process 64x64 images with 11x11 convolution kernels. The maximum equivalent operation rate that can be reached is 163.51 MOPS for 11x11 kernels, in a Xilinx Spartan 3 400 FPGA with a 50MHz clock. Formulations, hardware architecture, operation examples and performance comparison with frame-based convolution processors are presented and discussed. |
Identificador del proyecto | TEC2006-11730-C03-02
TEC2009-10639-C04-02 P06-TIC-01417 |
Cita | Linares Barranco, A., Paz Vicente, R., Gómez Rodríguez, F.d.A., Jiménez Fernández, Á.F., Rivas Pérez, M., Jiménez Moreno, G. y Civit Balcells, A. (2010). On the AER Convolution Processors for FPGA. En ISCAS 2010: IEEE International Symposium on Circuits and Systems (4237-4240), Paris, France: IEEE Computer Society. |
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