Ponencia
A 0.13μm CMOS current steering D/A converter for PLC and VDSL applications
Autor/es | Ruiz Amaya, Jesús
Fernández Bootello, Juan Francisco Rosa Utrera, José Manuel de la Delgado Restituto, Manuel Río Fernández, Rocío del |
Departamento | Universidad de Sevilla. Departamento de Electrónica y Electromagnetismo |
Fecha de publicación | 2005 |
Fecha de depósito | 2018-10-26 |
Publicado en |
|
Resumen | This paper describes the design of a 12-bit
80MS/s Digital-to-Analog converter implemented in a
0.13μm CMOS logic technology. The design has been
computer-aided by a developed toolbox for the simulation
and verification ... This paper describes the design of a 12-bit 80MS/s Digital-to-Analog converter implemented in a 0.13μm CMOS logic technology. The design has been computer-aided by a developed toolbox for the simulation and verification of Nyquist-Rate Analog-to-Digital and Digital-to-Analog converters in MATLAB. The converter is segmented in an unary current-cell matrix for 8 MSB's and a binary-weighted array for 4 LSB's. Current sources of the converter are laid out separately from current- cell switching matrix core block and distributed in double centroid to reduce random errors and transient noise coupling. The linearity errors caused by remaining gradient errors are reduced by a modified Q2 Random- Walk switching sequence. Transistor-level simulation results show that the Spurious-Free Dynamic-Range is better than 58.5dB up to 80MS/s. The estimated Signal- to-Noise Distortion Ratio yield is 99.7% and better than 58dB from DC to Nyquist frequency. Multi-Tone Power Ratio is higher than 59dB for several DMT test signals. The converter dissipates less than 129mW from a 3.3V supply and occupies less than 1.7mm2 active area. |
Agencias financiadoras | Ministerio de Ciencia y Tecnología (MCYT). España European Union (UE) |
Identificador del proyecto | TIC2003-02355RAICONIF |
Cita | Ruiz Amaya, J., Fernández Bootello, J.F., Rosa Utrera, J.M.d.l., Delgado Restituto, M. y Río Fernández, R.d. (2005). A 0.13μm CMOS current steering D/A converter for PLC and VDSL applications. En Conference on Design of Circuits and Integrated Systems, Lisboa (Portugal). |
Ficheros | Tamaño | Formato | Ver | Descripción |
---|---|---|---|---|
A 0.13μm.pdf | 464.5Kb | [PDF] | Ver/ | |