Article
A calibration technique for very low current and compact tunable neuromorphic cells: Application to 5-bit 20nA DACs
Author/s | Leñero Bardallo, Juan Antonio
![]() ![]() ![]() ![]() ![]() ![]() ![]() Serrano Gotarredona, María Teresa ![]() ![]() ![]() ![]() ![]() ![]() ![]() Linares Barranco, Bernabé |
Department | Universidad de Sevilla. Departamento de Arquitectura y Tecnología de Computadores Universidad de Sevilla. Departamento de Electrónica y Electromagnetismo |
Publication Date | 2008 |
Deposit Date | 2018-07-23 |
Published in |
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Abstract | Low current applications, like neuromorphic circuits, where operating currents can be as low as a few nanoamperes or less, suffer from huge transistor mismatches, resulting in around or less than 1-bit precisions. Recently, ... Low current applications, like neuromorphic circuits, where operating currents can be as low as a few nanoamperes or less, suffer from huge transistor mismatches, resulting in around or less than 1-bit precisions. Recently, a neuromorphic programmable- kernel 2-D convolution chip has been reported where each pixel included two compact calibrated digital-to-analog converters (DACs) of 5-bit resolution, for currents down to picoamperes. Those DACs were based on MOS ladder structures, which although compact require unit transistors ( is the number of calibration bits). Here, we present a new calibration approach not based on ladders, but on individually calibratable current sources made with MOS transistors of digitally adjustable length, which require only -sized transistors. The scheme includes a translinear circuit-based tuning scheme, which allows us to expand the operating range of the calibrated circuits with graceful precision degradation, over four decades of operating currents. Experimental results are provided for 5-bit resolution DACs operating at 20 nA using two different translinear tuning schemes. Maximum measured precision is 5.05 and 7.15 b, respectively, for the two DAC schemes. |
Funding agencies | Gobierno de España European Union (UE) |
Project ID. | TEC2006-11730-C03-01
![]() TEC-417 ![]() IST-2001-34124 ![]() |
Citation | Leñero Bardallo, J.A., Serrano Gotarredona, M.T. y Linares Barranco, B. (2008). A calibration technique for very low current and compact tunable neuromorphic cells: Application to 5-bit 20nA DACs. IEEE Transactions on Circuits and Systems II: Express Briefs, 55 (6), 522-526. |
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