dc.creator | Serrano Gotarredona, María Teresa | es |
dc.creator | Linares Barranco, Bernabé | es |
dc.creator | Andreou, Andreas G. | es |
dc.date.accessioned | 2018-06-22T13:07:45Z | |
dc.date.available | 2018-06-22T13:07:45Z | |
dc.date.issued | 1999 | |
dc.identifier.citation | Serrano Gotarredona, M.T., Linares Barranco, B. y Andreou, A.G. (1999). A general translinear principle for subthreshold MOS transistors. IEEE Transactions on Circuits and Systems I - Fundamental Theory and Applications, 46 (5), 607-616. | |
dc.identifier.issn | 1057-7122 | es |
dc.identifier.uri | https://hdl.handle.net/11441/76403 | |
dc.description.abstract | This paper revises the conditions under which the translinear principle can be fully exploited for MOS transistors operating in subthreshold. Due to the exponential nature of subthreshold MOS transistors, the translinear principle applies immediately as long as the source-to-bulk voltages are made equal to zero (or constant). This paper addresses the conditions under which subthreshold MOS transistors still satisfy a translinear principle, but without imposing this constraint on all VBS voltages. It is found that the translinear principle results in a more general formulation than the originally found for BJT's since now multiple translinear loops can be involved. The constraint of an even number of transistors is no longer necessary. Some corollaries are stated as well and, finally, it is shown how to use the theorem for subthreshold MOS transistors operated in the ohmic regime. | es |
dc.description.sponsorship | Office of Naval Research (USA) N00014-95-1-0409 | es |
dc.format | application/pdf | es |
dc.language.iso | eng | es |
dc.publisher | Institute of Electrical and Electronics Engineers | es |
dc.relation.ispartof | IEEE Transactions on Circuits and Systems I - Fundamental Theory and Applications, 46 (5), 607-616. | |
dc.rights | Attribution-NonCommercial-NoDerivatives 4.0 Internacional | * |
dc.rights.uri | http://creativecommons.org/licenses/by-nc-nd/4.0/ | * |
dc.subject | CMOS analog integrated circuits | es |
dc.subject | Current mode circuits | es |
dc.subject | Low-power circuits | es |
dc.subject | Nonlinear circuits | es |
dc.subject | Subthreshold circuits | es |
dc.subject | Translinear circuits | es |
dc.subject | Very large scale integration | es |
dc.title | A general translinear principle for subthreshold MOS transistors | es |
dc.type | info:eu-repo/semantics/article | es |
dcterms.identifier | https://ror.org/03yxnpp24 | |
dc.type.version | info:eu-repo/semantics/acceptedVersion | es |
dc.rights.accessRights | info:eu-repo/semantics/openAccess | es |
dc.contributor.affiliation | Universidad de Sevilla. Departamento de Arquitectura y Tecnología de Computadores | es |
dc.relation.projectID | N00014-95-1-0409 | es |
dc.relation.publisherversion | http://dx.doi.org/10.1109/81.762926 | es |
dc.identifier.doi | 10.1109/81.762926 | es |
idus.format.extent | 10 p. | es |
dc.journaltitle | IEEE Transactions on Circuits and Systems I - Fundamental Theory and Applications | es |
dc.publication.volumen | 46 | es |
dc.publication.issue | 5 | es |
dc.publication.initialPage | 607 | es |
dc.publication.endPage | 616 | es |
dc.contributor.funder | Office of Naval Research (ONR). United States | |