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dc.creatorHuertas Sánchez, Gloriaes
dc.creatorVázquez García de la Vega, Diegoes
dc.creatorPeralías Macías, Eduardoes
dc.creatorRueda Rueda, Adoraciónes
dc.creatorHuertas Díaz, José Luises
dc.date.accessioned2018-06-18T16:32:55Z
dc.date.available2018-06-18T16:32:55Z
dc.date.issued2002
dc.identifier.citationHuertas Sánchez, G., Vázquez García de la Vega, D., Peralías Macías, E., Rueda Rueda, A. y Huertas Díaz, J.L. (2002). Testing mixed-signal cores: a practical oscillation-based test in an analog macrocell. IEEE Design and Test of Computers, 19 (6), 73-82.
dc.identifier.issn0740-7475es
dc.identifier.urihttps://hdl.handle.net/11441/76292
dc.description.abstractA formal set of design decisions can aid in using oscillation-based test (OBT) for analog subsystems in SoCs. The goal is to offer designers testing options that do not have significant area overhead, performance degradation, or test time. This work shows that OBT is a potential candidate for IP providers to use in combination with functional test techniques. We have shown how to modify the basic concept of OBT to come up with a practical method. Using our approach, designers can use OBT to pave the way for future developments in SoC testing, and it is simple to extend this idea to BIST.es
dc.description.sponsorshipEuropean Union 26354es
dc.formatapplication/pdfes
dc.language.isoenges
dc.publisherInstitute of Electrical and Electronics Engineerses
dc.relation.ispartofIEEE Design and Test of Computers, 19 (6), 73-82.
dc.rightsAttribution-NonCommercial-NoDerivatives 4.0 Internacional*
dc.rights.urihttp://creativecommons.org/licenses/by-nc-nd/4.0/*
dc.titleTesting mixed-signal cores: a practical oscillation-based test in an analog macrocelles
dc.typeinfo:eu-repo/semantics/articlees
dcterms.identifierhttps://ror.org/03yxnpp24
dc.type.versioninfo:eu-repo/semantics/acceptedVersiones
dc.rights.accessRightsinfo:eu-repo/semantics/openAccesses
dc.contributor.affiliationUniversidad de Sevilla. Departamento de Electrónica y Electromagnetismoes
dc.relation.projectID26354es
dc.relation.publisherversionhttp://dx.doi.org/10.1109/MDT.2002.1047746es
dc.identifier.doi10.1109/MDT.2002.1047746es
idus.format.extent10 p.es
dc.journaltitleIEEE Design and Test of Computerses
dc.publication.volumen19es
dc.publication.issue6es
dc.publication.initialPage73es
dc.publication.endPage82es
dc.contributor.funderEuropean Union (UE)

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Except where otherwise noted, this item's license is described as: Attribution-NonCommercial-NoDerivatives 4.0 Internacional