Presentation
A charge correction cell for FGMOS-based circuits
Author/s | Rodríguez Villegas, Esther
Yúfera García, Alberto Rueda Rueda, Adoración |
Department | Universidad de Sevilla. Departamento de Tecnología Electrónica Universidad de Sevilla. Departamento de Electrónica y Electromagnetismo |
Publication Date | 2003 |
Deposit Date | 2018-06-05 |
Published in |
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ISBN/ISSN | 0-7695-2009-X |
Abstract | This paper describes a novel cell used in circuits with
Floating Gate MOS transistors (FGMOS) to compensate
variations in the device effective threshold voltages caused
by the trapped charge at the floating gate. The ... This paper describes a novel cell used in circuits with Floating Gate MOS transistors (FGMOS) to compensate variations in the device effective threshold voltages caused by the trapped charge at the floating gate. The performance of the circuit is illustrated with experimental results showing a residual error below 1%. This coarse compensation makes possible to reduce charge effects to the same order of magnitude than the conventional mismatching in normal MOS transistors. |
Citation | Rodríguez Villegas, E., Yúfera García, A. y Rueda Rueda, A. (2003). A charge correction cell for FGMOS-based circuits. En SBCCI 2003: 16th Symposium on Integrated Circuits and Systems Design (191-195), Sao Paulo, Brazil: IEEE Computer Society. |
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A Charge Correction Cell.pdf | 251.4Kb | [PDF] | View/ | |