Presentation
Design Methodology for Face Detection Acceleration
Author/s | Acasandrei, Laurentiu
Barriga Barros, Ángel |
Department | Universidad de Sevilla. Departamento de Electrónica y Electromagnetismo |
Publication Date | 2013 |
Deposit Date | 2018-05-29 |
Published in |
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ISBN/ISSN | 978-1-4799-0224-8 |
Abstract | A design methodology to accelerate the face
detection for embedded systems is described, starting from high
level (algorithm optimization) and ending with low level
(software and hardware codesign) by addressing the ... A design methodology to accelerate the face detection for embedded systems is described, starting from high level (algorithm optimization) and ending with low level (software and hardware codesign) by addressing the issues and the design decisions made at each level based on the performance measurements and system limitations. The implemented embedded face detection system consumes very little power compared with the traditional PC software implementations while maintaining the same detection accuracy. The proposed face detection acceleration methodology is suitable for real time applications. |
Funding agencies | Ministerio de Ciencia e Innovación (MICIN). España Junta de Andalucía |
Project ID. | TEC2011-24319
P08-TIC-03674 |
Citation | Acasandrei, L. y Barriga Barros, Á. (2013). Design Methodology for Face Detection Acceleration. En Industrial Electronics Society, IECON 2013 - 39th Annual Conference of the IEEE (1-6), Viena (Austria): Institute of Electrical and Electronics Engineers. |
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Design Methodology.pdf | 202.4Kb | [PDF] | View/ | |