Fast-Convergence Microsecond-Accurate Clock Discipline Algorithm for Hardware Implementation

Viejo Cortés, Julián; Juan Chico, Jorge; Bellido Díaz, Manuel Jesús; Millán Calderón, Alejandro; Ruiz de Clavijo Vázquez, Paulino

doi:10.1109/TIM.2011.2164828

Artículo

dc.creator	Viejo Cortés, Julián	es
dc.creator	Juan Chico, Jorge	es
dc.creator	Bellido Díaz, Manuel Jesús	es
dc.creator	Millán Calderón, Alejandro	es
dc.creator	Ruiz de Clavijo Vázquez, Paulino	es
dc.date.accessioned	2017-01-25T10:18:13Z
dc.date.available	2017-01-25T10:18:13Z
dc.date.issued	2011
dc.identifier.citation	Viejo Cortés, J., Juan Chico, J., Bellido Díaz, M.J., Millán Calderón, A. y Ruiz de Clavijo Vázquez, P. (2011). Fast-Convergence Microsecond-Accurate Clock Discipline Algorithm for Hardware Implementation. IEEE Transactions on Instrumentation and Measurement, 60 (12), 3961-3963.
dc.identifier.issn	0018-9456	es
dc.identifier.uri	http://hdl.handle.net/11441/52740
dc.description.abstract	Discrete microprocessor-based equipment is a typical synchronization system on the market which implements the most critical features of the synchronization protocols in hardware and the synchronization algorithms in software. In this paper, a new clock discipline algorithm for hardware implementation is presented, allowing for full hardware implementation of synchronization systems. Measurements on field-programmable gate array prototypes show a fast convergence time (below 10 s) and a high accuracy (1 μs) for typical configuration parameters.	es
dc.description.sponsorship	Ministerio de Educación y Cultura HIPER TEC2007-61802/MIC	es
dc.format	application/pdf	es
dc.language.iso	eng	es
dc.publisher	IEEE Computer Society	es
dc.relation.ispartof	IEEE Transactions on Instrumentation and Measurement, 60 (12), 3961-3963.
dc.rights	Attribution-NonCommercial-NoDerivatives 4.0 Internacional	*
dc.rights.uri	http://creativecommons.org/licenses/by-nc-nd/4.0/	*
dc.subject	Field-programmable gate array	es
dc.subject	hardware timestamping	es
dc.subject	Network Time Protocol (NTP)	es
dc.subject	Precision Time Protocol (PTP)	es
dc.subject	synchronization system	es
dc.title	Fast-Convergence Microsecond-Accurate Clock Discipline Algorithm for Hardware Implementation	es
dc.type	info:eu-repo/semantics/article	es
dcterms.identifier	https://ror.org/03yxnpp24
dc.type.version	info:eu-repo/semantics/acceptedVersion	es
dc.rights.accessRights	info:eu-repo/semantics/openAccess	es
dc.contributor.affiliation	Universidad de Sevilla. Departamento de Tecnología Electrónica	es
dc.relation.projectID	HIPER TEC2007-61802/MIC	es
dc.relation.publisherversion	http://ieeexplore.ieee.org/document/6017115/	es
dc.identifier.doi	10.1109/TIM.2011.2164828	es
dc.contributor.group	Universidad de Sevilla. TIC204: Investigación y Desarrollo Digital (ID2)	es
idus.format.extent	3	es
dc.journaltitle	IEEE Transactions on Instrumentation and Measurement	es
dc.publication.volumen	60	es
dc.publication.issue	12	es
dc.publication.initialPage	3961	es
dc.publication.endPage	3963	es
dc.contributor.funder	Ministerio de Educación y Cultura (MEC). España

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