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dc.creatorViejo Cortés, Juliánes
dc.creatorVillar de Ossorno, José Ignacioes
dc.creatorJuan Chico, Jorgees
dc.creatorMillán Calderón, Alejandroes
dc.creatorBellido Díaz, Manuel Jesúses
dc.creatorOstúa Arangüena, Enriquees
dc.date.accessioned2017-01-24T11:53:14Z
dc.date.available2017-01-24T11:53:14Z
dc.date.issued2010
dc.identifier.citationViejo Cortés, J., Villar de Ossorno, J.I., Juan Chico, J., Millán Calderón, A., Bellido Díaz, M.J. y Ostúa Arangüena, E. (2010). Design and implementation of a suitable core for on-chip long-term verification. En International Symposium on Industrial Embedded Systems, SIES 2010 (234-237), Trento, Italia: IEEE Computer Society.
dc.identifier.isbn978-1-4244-5839-4es
dc.identifier.urihttp://hdl.handle.net/11441/52637
dc.description.abstractTraditional on-chip and off-chip logic analyzers present important shortcomings when used for the long-term verification of industrial embedded systems, forcing the designer to implement ad-hoc verification solutions. This contribution presents a suitable solution for long-term verification of FPGAbased designs consisting on a verification core that uses the Picoblaze microcontroller, dedicated logic and a serial port communication in order to monitor the internal signals of the system in a continuous way. The core design focuses on low resource requirements and reusability and has been successfully applied to the verification of a real industrial synchronization platform showing remarkable advantages over commercial onchip solutions like Xilinx’s ChipScope Pro.es
dc.description.sponsorshipMinisterio de Educación y Cultura TEC2007-61802/MIC (HIPERes
dc.description.sponsorshipMinisterio de Educación y Cultura PROFIT-MITC SEPIC TSI-020100-2008-258es
dc.formatapplication/pdfes
dc.language.isoenges
dc.publisherIEEE Computer Societyes
dc.relation.ispartofInternational Symposium on Industrial Embedded Systems, SIES 2010 (2010), p 234-237
dc.rightsAttribution-NonCommercial-NoDerivatives 4.0 Internacional*
dc.rights.urihttp://creativecommons.org/licenses/by-nc-nd/4.0/*
dc.titleDesign and implementation of a suitable core for on-chip long-term verificationes
dc.typeinfo:eu-repo/semantics/conferenceObjectes
dc.type.versioninfo:eu-repo/semantics/acceptedVersiones
dc.rights.accessRightsinfo:eu-repo/semantics/openAccesses
dc.contributor.affiliationUniversidad de Sevilla. Departamento de Tecnología Electrónicaes
dc.relation.projectIDTEC2007-61802/MIC (HIPERes
dc.relation.projectIDPROFIT-MITC SEPIC TSI-020100-2008-258es
dc.relation.publisherversionhttp://ieeexplore.ieee.org/document/5551400/es
dc.identifier.doi10.1109/SIES.2010.5551400es
dc.contributor.groupUniversidad de Sevilla. TIC204: Investigación y Desarrollo Digital (ID2)es
idus.format.extent4es
dc.publication.initialPage234es
dc.publication.endPage237es
dc.eventtitleInternational Symposium on Industrial Embedded Systems, SIES 2010es
dc.eventinstitutionTrento, Italiaes
dc.relation.publicationplaceUSAes
dc.contributor.funderMinisterio de Educación y Cultura (MEC). España

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