Presentation
Building a basic membrane computer
Author/s | Millán Calderón, Alejandro
Viejo Cortés, Julián Quirós Carmona, Juan Bellido Díaz, Manuel Jesús Guerrero Martos, David Ostúa Arangüena, Enrique |
Department | Universidad de Sevilla. Departamento de Tecnología Electrónica |
Publication Date | 2016 |
Deposit Date | 2016-12-19 |
Published in |
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Abstract | In this work, we present the building of two well-known membrane com-
puters (squares generator and divisor test). Although they are very basic machines they
present problems common to every P system (competition, parallel ... In this work, we present the building of two well-known membrane com- puters (squares generator and divisor test). Although they are very basic machines they present problems common to every P system (competition, parallel execution of rules, membrane dissolution, etc.) that have to be solved in order to get real emulations for them. The presented designs mimic the systems operation in a realistic way, by achieving both maximum parallelism and non-determinism, and demonstrating for the rst time that a membrane computer can actually be built in silico. Our architectures fully emu- late the membranes behaviour yielding to a performance of one transition per clock cycle, supposing a real physical realization of the mentioned machines. |
Citation | Millán Calderón, A., Viejo Cortés, J., Quiros, J., Bellido Díaz, M.J., Guerrero Martos, D. y Ostua Arangüena, E. (2016). Building a basic membrane computer. En BWMC 2016 : 14th Brainstorming Week on Membrane Computing : Sevilla, E. T. S. de Ingeniería Informática, February 1-5 (269-280), Sevilla: Fénix. |
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269_main_building.pdf | 856.9Kb | [PDF] | View/ | |