Ponencia
A hierarchical approach for the symbolic analysis of large analog integrated circuits
Autor/es | Guerra Vinuesa, Oscar
Roca Moreno, Elisenda Fernández Fernández, Francisco Vidal Rodríguez Vázquez, Ángel Benito |
Departamento | Universidad de Sevilla. Departamento de Electrónica y Electromagnetismo |
Fecha de publicación | 2000 |
Fecha de depósito | 2016-02-08 |
Publicado en |
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ISBN/ISSN | 0769505376 |
Resumen | This paper introduces a new hierarchical analysis methodology
which incorporates approximation strategies
during the analysis process. Consequently, the circuit
sizes that can be analyzed increase dramatically, ... This paper introduces a new hierarchical analysis methodology which incorporates approximation strategies during the analysis process. Consequently, the circuit sizes that can be analyzed increase dramatically, without suffering from the combinatorial explosion of expression complexity. Moreover, the interpretability and usability in practical applications is enabled by providing analytical models that keep complexity at a minimum with the prescribed accuracy |
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