OFDM synchronization scheme for Power Line Telecommunications (PLT)

dc.creator	Baena Lecuyer, Vicente	es
dc.creator	Granado Romero, Joaquín	es
dc.creator	Aguirre Echanove, Miguel Ángel	es
dc.creator	Torralba Silgado, Antonio Jesús	es
dc.creator	García Franquelo, Leopoldo	es
dc.date.accessioned	2015-03-26T08:28:27Z
dc.date.available	2015-03-26T08:28:27Z
dc.date.issued	2001	es
dc.identifier.uri	http://hdl.handle.net/11441/23581
dc.description.abstract	This paper presents a new scheme for OFDM time and frequency synchronization with application in Power Line Telecommunications (PLT). Simulation results show an excellent behavior, even for the low values of SNR in the synchronizer input inherent to PLT. The synchronizer has been prototyped on an FPGA prior to be integrated in the single-chip PLT system.	en
dc.format	application/pdf	es
dc.language.iso	eng	es
dc.relation.ispartof	15th Proceedings of the Design of Circuits and Integrated Systems. Oporto, Portugal : DCIS	es
dc.rights	Attribution-NonCommercial-NoDerivatives 4.0 Internacional	es
dc.rights.uri	http://creativecommons.org/licenses/by-nc-nd/4.0/	es
dc.title	OFDM synchronization scheme for Power Line Telecommunications (PLT)	en
dc.type	info:eu-repo/semantics/conferenceObject	es
dcterms.identifier	https://ror.org/03yxnpp24
dc.rights.accessRights	info:eu-repo/semantics/openAccess	es
dc.contributor.affiliation	Universidad de Sevilla. Departamento de Ingeniería Electrónica	es
dc.identifier.idus	https://idus.us.es/xmlui/handle/11441/23581

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