Ponencia
ASIC implementation of an ARM - based system on chip
Autor/es | Granado Romero, Joaquín
Chávez Orzaez, Jorge Jesús Colodro Ruiz, Francisco Torralba Silgado, Antonio Jesús García Franquelo, Leopoldo Ramos, E. Hidalgo, A. Tortolero, A. Ruiz, F. |
Departamento | Universidad de Sevilla. Departamento de Ingeniería Electrónica |
Fecha de publicación | 2000 |
Fecha de depósito | 2015-03-26 |
Publicado en |
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Resumen | This paper presents the hardware architecture of a System on Chip (SoC) implemented in an ASIC. It has been designed for a wide range of applications and will be used in a power line modem. A set of reusable cells based ... This paper presents the hardware architecture of a System on Chip (SoC) implemented in an ASIC. It has been designed for a wide range of applications and will be used in a power line modem. A set of reusable cells based on AMBA standard has been also designed, included memory, interrupt controller and peripherals. Presented architecture implements an ARM© processor, a 32-bit RISC processor which is becoming a RISC standard. |
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