Presentation
1.5V Rail-to-rail programmable-gain CMOS amplifier
Author/s | Ramírez Angulo, Jaime
López Martín, Antonio J. González Carvajal, Ramón ![]() ![]() ![]() ![]() ![]() ![]() ![]() Lackey, C. |
Department | Universidad de Sevilla. Departamento de Ingeniería Electrónica |
Publication Date | 2004 |
Deposit Date | 2023-02-23 |
Published in |
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ISBN/ISSN | 0-7803-7995-0 |
Abstract | A 1.5V programmable-gain differential amplifier is implemented using a novel design technique for operating closed-loop amplifier circuits at very low supply voltages. It is based on the use of quasi-floating gate transistors, ... A 1.5V programmable-gain differential amplifier is implemented using a novel design technique for operating closed-loop amplifier circuits at very low supply voltages. It is based on the use of quasi-floating gate transistors, avoiding issues encountered in true floating-gate structures such as the initial floating-gate charge, offset drift with temperature, and gain-bandwidth product degradation. A prototype fabricated in a 0.5-/spl mu/m CMOS technology shows a 0.6% THD for almost rail-to-rail outputs and a 4 MHz unity-gain bandwidth. |
Citation | Ramírez Angulo, J., López Martín, A.J., González Carvajal, R. y Lackey, C. (2004). 1.5V RAIL-TO-RAIL PROGRAMMABLE-GAIN CMOS AMPLIFIER. En European solid-state circuits conference (373-376), Estoril, Portugal: IEEE (Institute of Electrical and Electronics Engineers). |
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