dc.creator | Honarparvar, M. | es |
dc.creator | Rosa Utrera, José Manuel de la | es |
dc.creator | Nabki, F. | es |
dc.creator | Sawan, Mohamad | es |
dc.date.accessioned | 2023-02-21T17:13:00Z | |
dc.date.available | 2023-02-21T17:13:00Z | |
dc.date.issued | 2017 | |
dc.identifier.citation | Honarparvar, M., Rosa Utrera, J.M.d.l., Nabki, F. y Sawan, M. (2017). SMASH ΔΣ modulator with adderless feed-forward loop filter. Electronics Letters, 53 (8), 532-534. https://doi.org/10.1049/el.2016.4733. | |
dc.identifier.issn | 0013-5194 | es |
dc.identifier.issn | 1350-911X | es |
dc.identifier.uri | https://hdl.handle.net/11441/142861 | |
dc.description.abstract | A novel cascade ΔΣ modulator, which combines the benefits of sturdy MASH (SMASH) topology and feed-forward loop filter, is presented. The proposed ΔΣ architecture is based on moving the power-hungry adder block from the quantiser input to the first integrator output. The proposed architecture shows a better operational transconductance amplifier (OTA) linearity and relaxed OTA DC-gain compared with conventional MASH and SMASH topologies. This feature makes the modulator topology more suitable than conventional MASH and SMASH topologies for low-voltage applications. | es |
dc.description.sponsorship | Ministerio de Economía y Competitividad TEC2013-45638-C3-3-R | es |
dc.format | application/pdf | es |
dc.format.extent | 2 p. | es |
dc.language.iso | eng | es |
dc.publisher | Wiley-Blackwell | es |
dc.relation.ispartof | Electronics Letters, 53 (8), 532-534. | |
dc.rights | Attribution-NonCommercial-NoDerivatives 4.0 Internacional | * |
dc.rights.uri | http://creativecommons.org/licenses/by-nc-nd/4.0/ | * |
dc.title | SMASH ΔΣ modulator with adderless feed-forward loop filter | es |
dc.type | info:eu-repo/semantics/article | es |
dcterms.identifier | https://ror.org/03yxnpp24 | |
dc.type.version | info:eu-repo/semantics/acceptedVersion | es |
dc.rights.accessRights | info:eu-repo/semantics/openAccess | es |
dc.contributor.affiliation | Universidad de Sevilla. Departamento de Electrónica y Electromagnetismo | es |
dc.relation.projectID | TEC2013-45638-C3-3-R | es |
dc.relation.publisherversion | https://doi.org/10.1049/el.2016.4733 | es |
dc.identifier.doi | 10.1049/el.2016.4733 | es |
dc.journaltitle | Electronics Letters | es |
dc.publication.volumen | 53 | es |
dc.publication.issue | 8 | es |
dc.publication.initialPage | 532 | es |
dc.publication.endPage | 534 | es |
dc.contributor.funder | Ministerio de Economía y Competitividad (MINECO). España | es |