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Ponencia
Design considerations for a low-noise CMOS image sensor
(SPIE- The International Society for Optical Engineering, 2015)
This paper reports a Low-Noise CMOS Image Sensor. Low-noise operation is achieved owing to the combination of a noise-enhanced pixel, the use of a two-step ADC architecture and the analysis, and the optimization thereof, ...
Ponencia
Transformer based front-end for a low power 2.4 GHz transceiver
(Institute of Electrical and Electronics Engineers, 2010)
A low power transceiver architecture for the 2.4 GHz ISM band using a 1.0 V supply is presented. It employs a transformer to convert the 100 Ω antenna impedance to almost 1 kΩ and so facilitates a low power transmitter and ...
Ponencia
FPGA implementation of an embedded face detection system based on LEON3
(2012)
This paper presents an FPGA face detection embedded system. In order achieve acceleration in the face detection process a hardware-software codesign technique is proposed. The paper describes the face detection ...
Ponencia
Artifact-Aware Analogue/Mixed-Signal Front-Ends for Neural Recording Applications
(Institute of Electrical and Electronics Engineers, 2019)
This paper presents a brief review of techniques to overcome the problems associated with artifacts in analog frontends for neural recording applications. These techniques are employed for handling Common-Mode (CM) ...
Ponencia
Switched-capacitor networks for scale-space generation
(Institute of Electrical and Electronics Engineers, 2011)
In scale-space filtering signals are represented at several scales, each conveying different details of the original signal. Every new scale is the result of a smoothing operator on a former scale. In image processing, ...
Ponencia
High-dynamic range tone-mapping algorithm for focal plane processors
(The International Society for Optics and Photonics, 2011)
This paper presents a Dynamic Range improvement technique which is specially well-suited to be implemented in Focal Plane Processors (FPP) due to its very limited computing requirements since only local memories, little ...
Ponencia
DOE based high-performance gate-level pipelines
(Institute of Electrical and Electronics Engineers, 2014)
Domino dynamic circuits are widely used in critical parts of high performance systems. In this paper we show that in addition to the functional limitation associated to the noninverting behavior of domino gates, there ...
Ponencia
Exploring logic architectures suitable for TFETs devices
(Institute of Electrical and Electronics Engineers, 2017)
Tunnel transistors are steep subthreshold slope devices suitable for low voltage operation so being potential candidates to overcome the power density and energy inefficiency limitations of CMOS technology, which are ...
Ponencia
A Dual-Factor Access Control System Based on Device and User Intrinsic Identifiers
(IEEE, 2016-12)
This paper proposes an access control system based on the simultaneous authentication of what the user has and who the user is. At enrollment phase, the wearable access device (a smart card, key fob, etc.) stores a ...
Ponencia
In-pixel generation of gaussian pyramid images by block reusing in 3D-CMOS
(Institute of Electrical and Electronics Engineers, 2012)
This paper introduces an architecture of a switched-capacitor network for Gaussian pyramid generation. Gaussian pyramids are used in modern scale- and rotation-invariant feature detectors or in visual attention. Our ...