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Mostrando ítems 11-20 de 32
Ponencia
Locust-inspired vision system on chip architecture for collision detection in automotive applications
(Institute of Electrical and Electronics Engineers, 2006)
This paper describes a programmable digital computing architecture dedicated to process information in accordance to the organization and operating principles of the four-layer neuron structure encountered at the visual ...
Ponencia
Control and acquisition system for a high dynamic range CMOS image sensor
(Institute of Electrical and Electronics Engineers, 2012)
A control and acquisition system for the visualization of the images captured with a High Dynamic Range (HDR) CMOS Image Sensor is developed. The image sensor is inserted in a PCB system, which performs low level control, ...
Ponencia
Integrated circuit interface for artificial skins
(SPIE Europe, 2007)
Artificial sensitive skins are intended to emulate the human skin to improve the skills of robots and machinery in complex unstructured environments. They are basically smart arrays of pressure sensors. As in the case of ...
Ponencia
ACE 16k based stand-alone system for real-time pre-processing tasks
(The International Society for Optical Engineering - SPIE, 2005)
This paper describes the design of a programmable stand-alone system for real time vision pre-processing tasks. The system's architecture has been implemented and tested using an ACE16k chip and a Xilinx xc4028xl FPGA. The ...
Ponencia
Demo: Real-time remote reporting of active regions with Wi-FLIP
(Institute of Electrical and Electronics Engineers, 2011)
This paper describes a real-time application programmed into Wi-FLIP, a wireless smart camera resulting from the integration of FLIP-Q, a focal-plane low-power image processor, and Imote2, a commercial WSN platform. The ...
Ponencia
Experimental demonstration of real-time image-processing using a VLSI analog programmable array processor
(SPIE- The International Society for Optical Engineering, 2000)
This paper describes a full-custom mixed-signal chip which embeds distributed optical signal acquisition, digitallyprogrammable analog parallel processing, and distributed image memory —cache— on a common silicon substrate. ...
Ponencia
Implementation of non-linear templates using a decomposition technique by a 0.5 /spl mu/m CMOS CNN universal chip
(Institute of Electrical and Electronics Engineers, 2000)
This paper demonstrates the processing capabilities of a recently designed analog programmable array processor. This new prototype, called CNNUC3, follows the cellular neural network universal machine computing paradigm. ...
Ponencia
Mismatch-induced tradeoffs and scalability of mixed-signal vision chips
(Institute of Electrical and Electronics Engineers, 2002)
This paper explores different trade-offs associated with the design of analog VLSI chips. These trade-offs are related to the necessity of keeping the analog accuracy while taking advantage of the possibility of reducing ...
Ponencia
CNN technology in action
(Institute of Electrical and Electronics Engineers, 2000)
Two Cellular Neural Net Universal Machine (CNN-UM) prototypes are demonstrated in action. The first one is the latest 4096 cell-processor, analog I/O, analogic CNN visual microprocessor, on which online video image processing ...
Ponencia
Realization of non-linear templates using the CNNUC3 prototype
(Institute of Electrical and Electronics Engineers, 2000)
Demonstrates the processing capabilities of an analog programmable array processor chipMINUS/CNNUC3-which follows the cellular neural network Universal Machine computing paradigm. Due to its very advanced features and ...