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Presentation
Analog weight buffering strategy for CNN chips
(Institute of Electrical and Electronics Engineers, 2003)
Large, gray-scale CNN chips employ analog signals to achieve high-density in the internal distribution of the template parameters. Despite the design strategies adopted at the circuitry employed to implement the weights, ...
Presentation
Wi-FLIP: A wireless smart camera based on a focal-plane low-power image processor
(Institute of Electrical and Electronics Engineers, 2011)
This paper presents Wi-FLIP, a vision-enabled WSN node resulting from the integration of FLIP-Q, a prototype vision chip, and Imotel, a commercial WSN platform. In Wi-FLIP, image processing is not only constrained to the ...
Presentation
Demo: Real-time remote reporting of active regions with Wi-FLIP
(Institute of Electrical and Electronics Engineers, 2011)
This paper describes a real-time application programmed into Wi-FLIP, a wireless smart camera resulting from the integration of FLIP-Q, a focal-plane low-power image processor, and Imote2, a commercial WSN platform. The ...
Presentation
Offset-compensated comparator with full-input range in 150nm FDSOI CMOS-3d technology
(Institute of Electrical and Electronics Engineers, 2010)
This paper addresses an offset-compensated comparator with full-input range in the 150nm FDSOI CMOS- 3D technology from MIT- Lincoln Laboratory. The comparator discussed here makes part of a vision system. Its architecture ...
Presentation
In-pixel ADC for a vision architecture on CMOS-3D technology
(Institute of Electrical and Electronics Engineers, 2010)
This paper addresses the design of an 8-bit single-slope in-pixel ADC for a 3D chip architecture intended for airborne surveillance and reconnaissance applications. The 3D chip architecture comprises a sensor layer with a ...