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Mostrando ítems 1-10 de 10
Ponencia
A CNN-driven locally adaptive CMOS image sensor
(Institute of Electrical and Electronics Engineers, 2004)
A bioinspired model for mixed-signal array mimics the way in which images are processed in the visual pathway. Focal-plane processing of images permits local adaptation of photoreceptor structures in silicon. Beyond simple ...
Ponencia
Analog weight buffering strategy for CNN chips
(Institute of Electrical and Electronics Engineers, 2003)
Large, gray-scale CNN chips employ analog signals to achieve high-density in the internal distribution of the template parameters. Despite the design strategies adopted at the circuitry employed to implement the weights, ...
Ponencia
Bio-inspired analog parallel array processor chip with programmable spatio-temporal dynamics
(Institute of Electrical and Electronics Engineers, 2002)
A bio-inspired model for an analog parallel array processor (APAP), based on studies on the vertebrate retina, permits the realization of complex spatio-temporal dynamics in VLSI. This model mimics the way in which images ...
Ponencia
3D multi-layer vision architecture for surveillance and reconnaissance applications
(Institute of Electrical and Electronics Engineers, 2009)
The architecture and the design details of a multilayer combined mixed-signal and digital sensor-processor array chip is shown. The processor layers are fabricated with 3D integration technology, and the sensor layer is ...
Ponencia
Robust symmetric multiplication for programmable analog VLSI array processing
(Institute of Electrical and Electronics Engineers, 2006)
This paper presents an electrically programmable analog multiplier. The circuit performs the multiplication between an input variable and an electrically selectable scaling factor. The multiplier is divided in several ...
Ponencia
3-Layer CNN Chip for Focal-Plane Complex Dynamics with Adaptive Image Capture
(Institute of Electrical and Electronics Engineers, 2006)
This paper presents a CMOS implementation of a layered CNN concurrent with 32times32 photosensors with locally programmable integration time for adaptive image capture. The network is arranged in two layers containing ...
Ponencia
A Focal-Plane Image Processor for Low Power Adaptive Capture and Analysis of the Visual Stimulus
(Institute of Electrical and Electronics Engineers, 2007)
Portable applications of artificial vision are limited by the fact that conventional processing schemes fail to meet the specifications under a tight power budget. A bio-inspired approach, based in the goal-directed ...
Ponencia
Programmable retinal dynamics in a CMOS mixed-signal array processor chip
(The International Society for Optical Engineering - SPIE, 2003)
The low-level image processing that takes place in the retina is intended to compress the relevant visual information to a manageable size. The behavior of the external layers of the biological retina has been successfully ...
Ponencia
CMOS realization of a 2-layer CNN universal machine chip
(Institute of Electrical and Electronics Engineers, 2002)
Some of the features of the biological retina can be modelled by a cellular neural network (CNN) composed of two dynamically coupled layers of locally connected elementary nonlinear processors. In order to explore the ...
Ponencia
A VLSI-oriented and power-efficient approach for dynamic texture recognition applied to smoke detection
(2009)
The recognition of dynamic textures is fundamental in processing image sequences as they are very common in natural scenes. The computation of the optic flow is the most popular method to detect, segment and analyse dynamic ...