Buscar
Mostrando ítems 1-10 de 73
Ponencia
Convergence and stability of the FSR CNN model
(Institute of Electrical and Electronics Engineers, 1994)
Stability and convergency results are reported for a modified continuous-time CNN model. The signal range of the state variables is equal to the unitary interval, independently of the application. Stability and convergency ...
Ponencia
Current-mode building blocks for CMOS-VLSI design of chaotic neural networks
(Institute of Electrical and Electronics Engineers, 1994)
This paper presents two nonlinear CMOS current-mode circuits that implement neuron soma equations for chaotic neural networks, and another circuit to realize programmable current-mode synapse using CMOS-compatible BJTs. ...
Ponencia
A CMOS fully-differential bandpass ΣΔ modulator using switched-current circuits
(Institute of Electrical and Electronics Engineers, 1995)
This paper presents a fourth-order bandpass sigma-delta modulator that has been designed using fully-differential switched-current circuits in a 0.8μm CMOS technology. The modulator prototype has been obtained by applying ...
Ponencia
CMOS design of adaptive fuzzy ASICs using mixed-signal circuits
(Institute of Electrical and Electronics Engineers, 1996)
Analog circuits are natural candidates to design fuzzy chips with optimum speed/power figures for precision up to about 1%. This paper presents a methodology and circuit blocks to realize fuzzy controllers in the form of ...
Ponencia
Hybrid-control of synapse circuits for programmable cellular neural networks
(Institute of Electrical and Electronics Engineers, 1996)
This paper describes a hybrid weight-control strategy for VLSI realizations of programmable Cellular Neural Networks (CNNs), based on auto-tuning of analog control signals to digitally specified values. The approach merges ...
Ponencia
Reliable analysis of settling errors in SC integrators - application to high-speed low-power ΣΔ modulators design
(1999)
This paper presents a detailed study on the transient response of SC integrators taking into account the effects of amplifier finite gain-bandwidth product and slew-rate during, unlike previous models, both the integration ...
Ponencia
Analog neural networks for real-time constrained optimization
(Institute of Electrical and Electronics Engineers, 1990)
Architectures and circuit techniques for implementing general piecewise constrained optimization problems using VLSI techniques are explored. Discrete-time analog techniques are considered due to their inherent accuracy, ...
Ponencia
Modular Design of Adaptive Analog CMOS Fuzzy Controller Chips
(Institute of Electrical and Electronics Engineers, 1995)
Analog circuits are natural candidates to design fuzzy chips with optimum speed/power figures for precision up to about 1%. This paper presents a methodology and circuit blocks to realize fuzzy controllers in the form of ...
Ponencia
CMOS design of chaotic oscillators using state variables: a monolithic Chua's circuit
(Institute of Electrical and Electronics Engineers, 1993)
This paper presents design considerations for monolithic implementation of piecewise-linear (PWL) dynamic systems in CMOS technology. Starting from a review of available CMOS circuit primitives and their respective merits ...
Ponencia
Modeling OpAmp-induced harmonic distortion for switched-capacitor ΣΔ modulator design
(Institute of Electrical and Electronics Engineers, 1994)
This communication reports a new modeling of opamp-induced harmonic distortion in SC ΣΔ modulators, which is aimed to optimum design of this kind of circuit for high-performance applications. We analyze incomplete transfer ...