Artículos (Instituto de Microelectrónica de Sevilla (IMSE-CNM))

URI permanente para esta colecciónhttps://hdl.handle.net/11441/10969

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  • Acceso AbiertoArtículo
    Reliable and Efficient Integration of AI into Camera Traps for Smart Wildlife Monitoring Based on Continual Learning
    (Elsevier, 2024) Velasco Montero, Delia; Fernández Berni, Jorge; Carmona Galán, Ricardo; Sanglas, Ariadna; Palomares, Francisco; Universidad de Sevilla. Departamento de Electrónica y Electromagnetismo; Ministerio de Ciencia e Innovación (MICIN). España; European Union (UE)
    In this paper, we comprehensively report on an efficient approach for the integration of artificial intelligence (AI) processing pipelines in camera traps for smart on-site wildlife monitoring. Our work covers hardware, software, and algorithmics. We have built two prototypes of smart camera trap on a maximum bill of materials of 100$. We have also built two datasets, made publicly available, comprising over 17 k images, many of them notably challenging even for humans. Leveraging our broad expertise on embedded systems, specialized software libraries and toolchains, and AI techniques such as transfer learning, explainable AI, and, most importantly, continual learning, we achieve more reliable inference on-site - specifically 10 % higher F1-score - than MegaDetector run off-site on a desktop computer. The paper includes many practical details on system realization and on-site training in addition to a vast set of lab and experimental results.
  • Acceso AbiertoArtículo
    Single-Shot Auto-Exposure and High Dynamic Range Imaging Based on Asynchronous Operation of Pixel Array Circuitry
    (John Wiley & Sons, 2024) Lamouaraa Sedlackova, Yassine; Fernández Berni, Jorge; Carmona Galán, R.; Universidad de Sevilla. Departamento de Electrónica y Electromagnetismo; Ministerio de Ciencia e Innovación (MICIN). España
    This paper introduces an image formation technique that realizes automatic adaptation to the illumination conditions during image capture. This adaptation takes place asynchronously in a single shot, requiring neither external control nor iterations on the exposure setting. These characteristics are especially suitable for applications such as visual robot navigation, where illumination may abruptly change and immediate decisions must be made. The equations that model the proposed technique show exposure-time independence. Moreover, each pixel adapts itself according to the ratio between local and global illuminations. The dependence on this ratio—which is a relative rather than absolute magnitude—along with the aforementioned independence on exposure time means that, theoretically, any illumination scenario can be represented within an arbitrary signal range. We also address the CMOS implementation of this technique. An extensive set of electrical simulations confirms its auto-exposure and high-dynamic-range encoding capabilities. In particular, we simulated the capture of a 118-dB scene on a (Formula presented.) -px array over five orders of magnitude of ambient illumination. Corner and mismatch simulations reveal strong robustness of the proposed circuitry against fabrication non-idealities. Finally, although we aim to applications in which large image resolution is not a critical specification, strategies to minimize the impact of the required focal-plane circuit elements on the pixel pitch are examined.
  • Acceso AbiertoArtículo
    Integrated sensors for electric stimulation of stem cells: A review on microelectrode arrays (MEAs) based systems
    (Elsevier, 2025-06) Algarín Pérez, Antonio; Martín Fernández, Daniel; Daza Navarro, María Paula; Huertas Sánchez, Gloria; Yúfera García, Alberto; Universidad de Sevilla. Departamento de Biología Celular; Universidad de Sevilla. Departamento de Electrónica y Electromagnetismo; Universidad de Sevilla. Departamento de Tecnología Electrónica; Ministerio de Ciencia e Innovación (MICIN). España
    This paper provides an update on the sensors and actuators involved in Stem Cells (SC) differentiation processes based on electric stimulation (STIM), including both current and future progress. These techniques are applied in a range of biological and medical protocols, including cell linage derivation, tissue engineering, cellular therapy, cancer research, and cell motility. The typical methodology of SC electric STIM endeavors to emulate biological processes by applying an electrical signal to the cell culture and evaluating the cell response. Cell metabolism is electrically sensitive, responding in some manner to a given stimulus. The precise mechanism by which this occurs is not fully understood, but it is evident that changes in ion density at the cell membrane proximity must excite the cell metabolism (receptors), thereby activating its “differentiation” in response. In order to gain a deeper insight into the cellular mechanisms involved in this process, the physical variables should be better recognized, measured, and quantified during the protocol execution. This work is contributing to the development of a compilation of proposed systems, and specifications required, to identify and better understand the local conditions within the cell environment that are responsible for the activation of the differentiation processes. It is crucial that STIM systems are optimally designed and that the cell response is correctly understood. Two features will be reviewed: the setup employed and the circuits for STIM and monitoring. The nexus between these two elements are the electrodes, and this work will therefore be devoted to the realization of integrated Micro-Electrode Arrays (MEAs), and the design problems associated with it. The focus will be on MEAs, with the same size scale as the cells, and the design issues related to integrated electrodes, under electric stimulation, voltage or current modes.
  • Acceso AbiertoArtículo
    A quantum-safe authentication scheme for IoT devices using homomorphic encryption and weak physical unclonable functions with no helper data
    (Elsevier, 2024-12) Román Hajderek, Roberto; Arjona, Rosario; Baturone Castillo, María Iluminada; Universidad de Sevilla. Departamento de Electrónica y Electromagnetismo; Ministerio de Ciencia e Innovación (MICIN). España; European Union (UE); Ministerio de Transformacion Digital y Función Pública. España
    Physical Unclonable Functions (PUFs) are widely used to authenticate electronic devices because they take advantage of random variations in the manufacturing process that are unique to each device and cannot be cloned. Therefore, each device can be uniquely identified and counterfeit devices can be detected. Weak PUFs, which support a relatively small number of challenge-response pairs (CRPs), are simple and easy to construct. Device authentication with weak PUFs typically uses helper data to obfuscate and recover a cryptographic key that is then required by a cryptographic authentication scheme. However, these schemes are vulnerable to helper-data attacks and many of them do not protect conveniently the PUF responses, which are sensitive data, as well as are not resistant to attacks performed by quantum computers. This paper proposes an authentication scheme that avoids the aforementioned weaknesses by not using helper data, protecting the PUF response with a quantum-safe homomorphic encryption, and by using a two-server setup. Specifically, the CRYSTALS-Kyber public key cryptographic algorithm is used for its quantum resistance and suitability for resource-constrained Internet-of-Things (IoT) devices. The practicality of the proposal was tested on an ESP32 microcontroller using its internal SRAM as a SRAM PUF. For PUF responses of 512 bits, the encryption execution time ranges from 16.41 ms to 41.08 ms, depending on the desired level of security. In terms of memory, the device only needs to store between 800 and 1,568 bytes. This makes the solution post-quantum secure, lightweight and affordable for IoT devices with limited computing, memory, and power resources.
  • Acceso AbiertoArtículo
    Unified RTN and BTI statistical compact modeling from a defect-centric perspective
    (Elsevier, 2021-11) Pedreira, G.; Martín Martínez, Javier; Saraza Canflanca, Pablo; Castro-López, Rubén; Rodríguez, R.; Roca, Elisenda; Fernández Fernández, Francisco Vidal; Nafria, Montserrat; Universidad de Sevilla. Departamento de Electrónica y Electromagnetismo; Agencia Estatal de Investigación. España
    In nowadays deeply scaled CMOS technologies, time-dependent variability effects have become important concerns for analog and digital circuit design. Transistor parameter shifts caused by Bias Temperature Instability and Random Telegraph Noise phenomena can lead to deviations of the circuit performance or even to its fatal failure. In this scenario extensive and accurate device characterization under several test conditions has become an unavoidable step towards trustworthy implementing the stochastic reliability models. In this paper, the statistical distributions of threshold voltage shifts in nanometric CMOS transistors will be studied at near threshold, nominal and accelerated aging conditions. Statistical modelling of RTN and BTI combined effects covering the full voltage range is presented. The results of this work suppose a complete modelling approach of BTI and RTN that can be applied in a wide range of voltages for reliability predictions.
  • Acceso AbiertoArtículo
    Statistical threshold voltage shifts caused by BTI and HCI at nominal and accelerated conditions
    (Elsevier, 2021-11) Díaz Fortuny, Javier; Saraza Canflanca, Pablo; Rodríguez, Rosana; Martín Martínez, Javier; Castro López, Rafael; Roca, Elisenda; Fernández Fernández, Francisco Vidal; Nafria, Montserrat; Universidad de Sevilla. Departamento de Electrónica y Electromagnetismo; Agencia Estatal de Investigación. España
    In nowadays deeply scaled CMOS technologies, time-zero and time-dependent variability effects have become important concerns for analog and digital circuit design. For instance, transistor parameter shifts caused by Bias Temperature Instability and Hot-Carrier Injection phenomena can lead to progressive deviations of the circuit performance or even to its catastrophic failure. In this scenario, and to understand the effects of these variability sources, an extensive and accurate device characterization under several test conditions has become an unavoidable step towards trustworthy implementing the stochastic reliability models and simulation tools needed to achieve reliable integrated circuits. In this paper, the statistical distributions of threshold voltage shifts in nanometric CMOS transistors will be studied at nominal and accelerated aging conditions. To this end, a versatile transistor array chip and a flexible measurement setup have been used to reduce the required testing time to attainable values.
  • Acceso AbiertoArtículo
    Statistical characterization of time-dependent variability defects using the maximum current fluctuation
    (Institute of Electrical and Electronics Engineers, 2021-06-17) Saraza Canflanca, Pablo; Martín Martínez, J.; Castro-López, Rubén; Roca, E.; Rodríguez, R.; Fernández Fernández, Francisco Vidal; Nafria, Montserrat; Universidad de Sevilla. Departamento de Electrónica y Electromagnetismo; Agencia Estatal de Investigación. España
    This article presents a new methodology to extract, at a given operation condition, the statistical distribution of the number of active defects that contribute to the observed device time-dependent variability, as well as their amplitude distribution. Unlike traditional approaches based on complex and time-consuming individual analysis of thousands of current traces, the proposed approach uses a simpler trace processing, since only the maximum and minimum values of the drain current during a given time interval are needed. Moreover, this extraction method can also estimate defects causing small current shifts, which can be very complex to identify by traditional means. Experimental data in a wide range of gate voltages, from near-threshold up to nominal operation conditions, are analyzed with the proposed methodology.
  • Acceso AbiertoArtículo
    Determination of the Time Constant Distribution of a Defect-Centric Time-Dependent Variability Model for Sub-100-nm FETs
    (IEEE, 2022) Saraza Canflanca, Pablo; Castro López, R.; Roca, E.; Martín Martínez, J.; Rodríguez, R.; Nafria, M.; Fernández Fernández, Francisco Vidal; Universidad de Sevilla. Departamento de Electrónica y Electromagnetismo; Ministerio de Ciencia e Innovación (MICIN). España; Junta de Andalucía
    The origin of some Time-Dependent Variability phenomena in FET technologies has been attributed to the charge carrier trapping/de-trapping activity of individual defects present in devices. Although some models have been presented to describe these phenomena from a so- called defect-centric perspective, limited attention has been paid to the complex process that goes from the experimental data of the phenomena up to the final construction of the model and all its components, specifically the one that pertains to the time constant distribution. This paper presents a detailed strategy aimed at determining the defect time constant distribution, specifically tailored for small area devices, using data obtained from conventional characterization procedures.
  • Acceso AbiertoArtículo
    Addressing a New Class of Multi-Objective Passive Device Optimization for Radiofrequency Circuit Design
    (MDPI, 2022) Moreira de Passos, Fabio; Roca, E.; Castro López, R.; Fernández Fernández, Francisco Vidal; Universidad de Sevilla. Departamento de Electrónica y Electromagnetismo; Ministerio de Ciencia e Innovación (MICIN). España; European Union (UE). H2020
    The design of radiofrequency circuits and systems lends itself to multi-objective optimization and the bottom-up composition of Pareto-optimal fronts. Conventional multi-objective optimization algorithms can effectively attain these fronts, which maximize or minimize a set of competing objective functions of interest. However, some of these real-life optimization problems reveal a non-conventional feature: there is one objective function that calls neither for minimization nor maximization. Instead, using the Pareto front demands this objective function to be swept across so that all its feasible values are available. Such a non-conventional feature, as shown here, emerges in the case of inductor optimization. The problem thus turns into a non-conventional one: determining how to find uniformly distributed feasible values of this function over the broadest possible range (typically unknown) while minimizing or maximizing the remaining competing objective functions. An NSGA-II-inspired algorithm is proposed that, based on the dynamic allocation of objective function slots and a modified dominance definition, can successfully return sets of solutions for inductor optimization problems with one sweeping objective. Furthermore, a mathematical benchmark function modeling this kind of problem is presented, which is also used to exhaustively test the proposed algorithm and obtain insight into its parameter settings.
  • Acceso AbiertoArtículo
    A High-voltage Floating Level Shifter for a Multi-stage Charge-pump in a Standard 1.8 V/3.3 V CMOS Process
    (Elsevier, 2022) Palomeque Mangut, David; Rodríguez Vázquez, Ángel Benito; Delgado Restituto, Manuel ; Universidad de Sevilla. Departamento de Electrónica y Electromagnetismo
    This paper proposes a high-voltage floating level shifter with a periodically-refreshed charge pump topology. Designed and fabricated in a standard 1.8 V/3.3 V CMOS process, the circuit can withstand shifting voltages from 3 V to 8.5 V with a delay response of 1.8 ns and occupies 0.008 mm2. The proposed circuit has been used in a multi-stage charge pump for programming its voltage conversion ratio. Experimental results show that the level shifters successfully enable/disable the stages of the charge pump, thus modifying its output voltage between 5.35 V and 12.4 V for an output current of 3 mA.
  • Acceso AbiertoArtículo
    A Fully Integrated, Power-Efficient, 0.07–2.08 mA, High-Voltage Neural Stimulator in a Standard CMOS Process
    (MDPI, 2022) Palomeque Mangut, David; Rodríguez Vázquez, Ángel Benito; Delgado Restituto, Manuel ; Universidad de Sevilla. Departamento de Electrónica y Electromagnetismo; Office of Naval Research (ONR). United States; Ministerio de Ciencia e Innovación (MICIN). España; Gobierno de España
    This paper presents a fully integrated high-voltage (HV) neural stimulator with on-chip HV generation. It consists of a neural stimulator front-end that delivers stimulation currents up to 2.08 mA with 5 bits resolution and a switched-capacitor DC-DC converter that generates a programmable voltage supply from 4.2 V to 13.2 V with 4 bits resolution. The solution was designed and fabricated in a standard 180 nm 1.8 V/3.3 V CMOS process and occupied an active area of 2.34 mm2. Circuit-level and block-level techniques, such as a proposed high-compliance voltage cell, have been used for implementing HV circuits in a low-voltage CMOS process. Experimental validation with an electrical model of the electrode–tissue interface showed that (1) the neural stimulator can handle voltage supplies up to 4 times higher than the technology’s nominal supply, (2) residual charge—without passive discharging phase—was below 0.12% for the whole range of stimulation currents, (3) a stimulation current of 2 mA can be delivered with a voltage drop of 0.9 V, and (4) an overall power efficiency of 48% was obtained at maximum stimulation current.
  • Acceso AbiertoArtículo
    A CMOS-compatible oscillation-based VO2 Ising machine solver
    (Springer Nature, 2024-04-18) Maher, Olivier; Jiménez, Manuel; Delacour, Corentin; Harnack, Nele; Núñez Martínez, Juan; Avedillo de Juan, María José; Linares Barranco, Bernabé; Todri Sanial, Aida; Indiveri, Giacomo; Karg, Siegfried; Universidad de Sevilla. Departamento de Electrónica y Electromagnetismo; European Union (UE)
    Phase-encoded oscillating neural networks offer compelling advantages over metal-oxide-semiconductor-based technology for tackling complex optimization problems, with promising potential for ultralow power consumption and exceptionally rapid computational performance. In this work, we investigate the ability of these networks to solve optimization problems belonging to the nondeterministic polynomial time complexity class using nanoscale vanadium-dioxide-based oscillators integrated onto a Silicon platform. Specifically, we demonstrate how the dynamic behavior of coupled vanadium dioxide devices can effectively solve combinatorial optimization problems, including Graph Coloring, Max-cut, and Max-3SAT problems. The electrical mappings of these problems are derived from the equivalent Ising Hamiltonian formulation to design circuits with up to nine crossbar vanadium dioxide oscillators. Using sub-harmonic injection locking techniques, we binarize the solution space provided by the oscillators and demonstrate that graphs with high connection density (η > 0.4) converge more easily towards the optimal solution due to the small spectral radius of the problem’s equivalent adjacency matrix. Our findings indicate that these systems achieve stability within 25 oscillation cycles and exhibit power efficiency and potential for scaling that surpasses available commercial options and other technologies under study. These results pave the way for accelerated parallel computing enabled by large-scale networks of interconnected oscillators.
  • Acceso AbiertoArtículo
    Electrical pulse stimulation parameters modulate N2a neuronal differentiation
    (Springer Nature, 2024-01-25) Martín Fernández, Daniel; Ruano Caballero, Diego; Yúfera García, Alberto; Daza Navarro, María Paula; Universidad de Sevilla. Departamento de Biología Celular; Universidad de Sevilla. Departamento de Bioquímica y Biología Molecular; Universidad de Sevilla. Departamento de Tecnología Electrónica
    Electrical pulse stimulation has been used to enhance the differentiation or proliferation of neuronal progenitor cells in tissue engineering and cancer treatment. Therefore, a comprehensive investigation of the effects caused by its parameters is crucial for improvements in those fields. We propose a study of pulse parameters, to allow the control of N2a cell line fate and behavior. We have focused on designing an experimental setup that allows for the knowledge and control over the environment and the stimulation signals applied. To map the effects of the stimulation on N2a cells, their morphology and the cellular and molecular reactions induced by the pulse stimulation have been analyzed. Immunofluorescence, rt-PCR and western blot analysis have been carried out for this purpose, as well as cell counting. Our results show that low-amplitude electrical pulse stimulation promotes proliferation of N2a cells, whilst amplitudes in the range 250 mV/mm–500 mV/mm induce differentiation. Amplitudes higher than 750 mV/mm produce cell damage at low frequencies. For high frequencies, large amplitudes are needed to cause cell death. An inverse relation has been found between cell density and pulse-induced neuronal differentiation. The best condition for neuronal differentiation was found to be 500 mV/mm at 100 Hz. These findings have been confirmed by up-regulation of the Neurod1 gene. Our preliminary study of the molecular effects of electrical pulse stimulation on N2a offers premonitory clues of the PI3K/Akt/GSK-3β pathway implications on the neuronal differentiation process through ES. In general, we have successfully mapped the sensitivity of N2a cells to electrical pulse stimulation parameters.
  • Acceso AbiertoArtículo
    Operation limits for RTD-based MOBILE circuits
    (IEEE, 2009-02) Quintana Toledo, José María; Avedillo de Juan, María José; Núñez Martínez, Juan; Pettenghi Roldán, Héctor; Universidad de Sevilla. Departamento de Electrónica y Electromagnetismo
    Resonant-tunneling-diode (RTD)-based monostable-bistable logic element (MOBILE) circuits operate properly in a certain frequency range. They exhibit both a minimum operating frequency and a maximum one. From a design point of view, it should be desirable to have gates with a correct operation from dc up to the maximum operating frequency (i.e., without the minimum bound). This paper undertakes this problem by analyzing how transistors and RTDs interact in RTD-based circuits. Two malfunctions have been identified: the incorrect evaluation of inputs and the lack of self-latching operation. The difficulty to study these problems in an analytical way has been overcome by resorting to series expansions for both the RTD and the heterojunction field-effect transistor I- V characteristics in the points of interest. We have obtained analytical expression linking representative device parameters and technological setup, for a MOBILE-based circuit to operate correctly.
  • Acceso AbiertoArtículo
    Efficient realisation of MOS-NDR threshold logic gates
    (Wiley Open Access, 2009-11-05) Núñez Martínez, Juan; Avedillo de Juan, María José; Quintana Toledo, José María; Universidad de Sevilla. Departamento de Electrónica y Electromagnetismo; Gobierno de España; Junta de Andalucía
    A novel realisation of inverted majority gates based on a programmable MOS-NDR device is presented. A comparison, in terms of area and power consumption, has been performed to demonstrate that the proposed circuit is more efficient than a similar reported structure.
  • Acceso AbiertoPonencia
    Securing Minutia Cylinder Codes for Fingerprints through Physically Unclonable Functions: An Exploratory Study
    (IEEE, 2018-07-16) Arjona, Rosario; Prada Delgado, Miguel Ángel; Baturone Castillo, María Iluminada; Ross, Arun; Ministerio de Economía y Competitividad (MINECO). España; European Commission (EC). Fondo Europeo de Desarrollo Regional (FEDER); Consejo Superior de Investigaciones Científicas (CSIC); National Science Foundation (NSF). United States; Universidad de Sevilla
    A number of personal devices, such as smartphones, have incorporated fingerprint recognition solutions for user authentication purposes. This work proposes a dual-factor fingerprint matching scheme based on P-MCCs (Protected Minutia Cylinder-Codes) generated from fingerprint images and PUFs (Physically Unclonable Functions) generated from device SRAMs (Static Random Access Memories). Combining the fingerprint identifier with the device identifier results in a secure template satisfying the discriminability, irreversibility, revocability, and unlinkability properties, which are strongly desired for data privacy and security. Experiments convey the benefits of the proposed dual-factor authentication mechanism in enhancing the security of personal devices that utilize biometric authentication schemes.
  • Acceso AbiertoPonencia
    Demonstrator of a fingerprint recognition algorithm into a low-power microcontroller
    (IEEE, 2017-11) Arcenegui Almenara, Javier; Arjona, Rosario; Baturone Castillo, María Iluminada; Universidad de Sevilla. Departamento de Electrónica y Electromagnetismo
    A demonstrator has been developed to illustrate the performance of a lightweight fingerprint recognition algorithm based on the feature QFingerMap16, which is extracted from a window of the directional image centered at the convex core of the fingerprint. The algorithm has been implemented into a lowpower ARM Cortex-M3 microcontroller included in a Texas Instruments LaunchPad CC2650 evaluation kit. It has been also implemented in a Raspberry Pi 2 so as to show the results obtained at the successive steps of the recognition process with the aid of a Graphical User Interface (GUI). The algorithm offers a good tradeoff between power consumption and recognition accuracy, being suitable for authentication on wearables.
  • Acceso AbiertoArtículo
    A Rad-hard On-chip CMOS Charge Detector with High Dynamic Range
    (Institute of Electrical and Electronics Engineers, 2023) Saenz-Noval, Jorge J.; Leñero Bardallo, Juan Antonio; Carmona Galán, Ricardo; Gontard, Lionel C.; Universidad de Sevilla. Departamento de Electrónica y Electromagnetismo; Ministerio de Ciencia, Innovación y Universidades (MICINN). España
    This article introduces a CMOS charge detector tailored for measuring ionizing radiation in a wide range of fluences. It represents an entirely on-chip solution based on capacitive sensing. It was fabricated using a standard 0.18 μm CMOS process and employs Metal-insulator-Metal (MiM) capacitor arrays to attain high matching, low leakage, and minimal process variations. The sensing area was radhardened with a post-CMOS layer of metal deposited with a Focus Ion Beam (FIB) that removes the use of external metallic plates. Experimental testing under the electron beam of a scanning electron microscope (SEM) demonstrated radiation hardness at energies up to 10 keV, with a very high dynamic range of up to 138 dB (externally adjustable), and with a sensitivity of 1.43 μV/e-. By harnessing the detection of relative charge variations instead of relying on absolute values, this approach proves highly suitable for particle event detection and facilitates future integrations compatible with the Address Event Representation (AER) communication protocol.
  • Acceso AbiertoArtículo
    A Low-Latency, Low-Power CMOS Sun Sensor for Attitude Calculation Using Photovoltaic Regime and On-Chip Centroid Computation
    (Institute of Electrical and Electronics Engineers, 2023) Gómez Merchán, Rubén; Leñero Bardallo, Juan Antonio; López Carmona, María; Rodríguez Vázquez, Ángel Benito; Universidad de Sevilla. Departamento de Electrónica y Electromagnetismo; Junta de Andalucía; Office of Naval Research (ONR). United States; Ministerio de Industria, Turismo y Comercio. España
    The demand for sun sensors has skyrocketed in the last years due to the huge expected deployment of satellites associated with the New Space concept. Sun sensors compute the position of the sun relative to the observer and play a crucial role in navigation systems. However, the sensor itself and the associated electronics must be able to operate in harsh environments. Thus, reducing hardware and post-processing resources improves the robustness of the system. Furthermore, reducing power consumption increases the lifetime of microsatellites with a limited power budget. This work describes the design, implementation, and characterization of a proof-of-concept prototype of a low-power, high-speed sun sensor architecture. The proposed sensor uses photodiodes working in the photovoltaic regime and event-driven vision concepts to overcome the limitations of conventional digital sun sensors in terms of latency, data throughput, and power consumption. The temporal resolution of the prototype is in the microsecond range with an average power consumption lower than 100 μW. Experimental results are discussed and compared with the state-of-the-art.
  • Acceso AbiertoArtículo
    A Mobile Platform for Movement Tracking Based on a Fast-Execution-Time Optical-Flow Algorithm
    (Institute of Electrical and Electronics Engineers, 2022) Rosa Vidal, Rafael de la; Leñero Bardallo, Juan Antonio; Guerrero Rodríguez, José María; Rodríguez Vázquez, Ángel Benito; Universidad de Sevilla. Departamento de Electrónica y Electromagnetismo; Junta de Andalucía; Ministerio de Economía y Competitividad (MINECO). España; Office of Naval Research (ONR). United States
    A multi-purpose mechanical platform to track moving objects in three-dimensional space has been developed. It is composed of one main microcontroller board that processes all system data, two cameras, three motors, and one secondary microcontroller board to position a platform with three degrees of freedom. The system computes the optical flow and moves the cameras accordingly, tracking motion within the visual scene. The platform operates autonomously. To the best of our knowledge, there are no similar systems reported with low-resolution image sensors and low-cost microcontrollers. Existing solutions rely on personal computers and advanced FPGAs to process image data. This article concludes that the optical flow operation is efficient even using an image sensor with very low resolution. Thus, the system complexity and image data processing are alleviated significantly. The platform can be easily adapted to different application scenarios by adding new peripherals, sensors, or image processing algorithms. A detailed description of the system design and experimental results are provided.