Listar Artículos (Instituto de Microelectrónica de Sevilla (IMSE-CNM)) por autor "Quintana Toledo, José María"
Mostrando ítems 1-12 de 12
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A practical floating-gate Muller-C element using vMOS threshold gates
(Institute of Electrical and Electronics Engineers, 2001)This paper presents the rationale for vMOS-based realizations of digital circuits when logic design techniques based on ...
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Domino inspired MOBILE networks
(Institute of Electrical and Electronics Engineers, 2012)MOBILE networks can be operated in a gate-level pipelined fashion allowing high through-output. If MOBILE gates are directly ...
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Efficient realisation of MOS-NDR threshold logic gates
(Wiley Open Access, 2009-11-05)A novel realisation of inverted majority gates based on a programmable MOS-NDR device is presented. A comparison, in terms ...
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Efficient realization of a threshold voter for self-purging redundancy
(Springer, 2001)The self-purging technique is not commonly used mainly due to the lack of practical implementations of its key component, ...
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Efficient state reduction methods for PLA-based sequential circuits
(Institute of Electrical and Electronics Engineers, 1992)Experiences with heuristics for the state reduction of finite-state machines are presented and two new heuristic algorithms ...
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Experimental Validation of a Two-Phase Clock Scheme for Fine-Grained Pipelined Circuits Based on Monostable to Bistable Logic Elements
(Institute of Electrical and Electronics Engineers, 2014)Abstract: Research on fine-grained pipelines can be a way to obtain high-performance applications. Monostable to bistable ...
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nu MOS-based sorter for arithmetic applications
(Hindawi Publishing Corporation, 2000)The capabilities of the conceptual link between threshold gates and sorting networks are explored by implementing some ...
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Operation limits for RTD-based MOBILE circuits
(IEEE, 2009-02)Resonant-tunneling-diode (RTD)-based monostable-bistable logic element (MOBILE) circuits operate properly in a certain ...
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RTD-CMOS pipelined networks for reduced power consumption
(Institute of Electrical and Electronics Engineers, 2011)The incorporation of resonant tunneling diodes (RTDs) into III/V transistor technologies has shown an improved circuit ...
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Sorting networks implemented as νMOS circuits
(Institute of Electrical and Electronics Engineers, 1998)A new realisation for n-input sorters is presented. Resorting to the neuron-MOS (νMOS) concept and to an adequate electrical scheme, a compact and efficient implementation is obtained.
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State merging and state splitting via state assignment: a new FSM synthesis algorithm
(Institute of Electrical and Electronics Engineers, 1994)The authors describe a state assignment algorithm for FSMs which produces an assignment of non-necessarily distinct, and ...
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Two-phase RTD-CMOS pipelined circuits
(Institute of Electrical and Electronics Engineers, 2012)MOnostable-BIstable Logic Element (MOBILE) networks can be operated in a gate-level pipelined fashion (nanopipeline) ...