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Listar Artículos (Instituto de Microelectrónica de Sevilla (IMSE-CNM)) por autor "Linares Barranco, Bernabé"
Mostrando ítems 1-20 de 55
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Artículo
10mhz cmos ota-c voltage-controlled quadrature oscillator
Linares Barranco, Bernabé; Rodríguez Vázquez, Ángel Benito; Sánchez Sinencio, Edgar; Huertas Díaz, José Luis (Institution of Engineering and Technology, 1989)A quadrature-type voltage-controlled oscillator with operational transconductance amplifiers and capacitors (OTA-C) is ...
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7-decade tuning range CMOS OTA-C sinusoidal VCO
Serrano Gotarredona, María Teresa; Linares Barranco, Bernabé (Institute of Electrical and Electronics Engineers, 1998)A new operational transconductance amplifier-capacitor (OTA-C) based sinusoidal voltage-controlled oscillator (VCO) has ...
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A 3.6 μ s latency asynchronous frame-free event-driven dynamic-vision-sensor
Leñero Bardallo, Juan Antonio; Serrano Gotarredona, María Teresa; Linares Barranco, Bernabé (Institute of Electrical and Electronics Engineers, 2011)This paper presents a 128 × 128 dynamic vision sensor. Each pixel detects temporal changes in the local illumination. A ...
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A 32 x 32 Pixel Convolution Processor Chip for Address Event Vision Sensors With 155 ns Event Latency and 20 Meps Throughput
Camuñas Mesa, Luis Alejandro; Acosta Jiménez, Antonio José; Zamarreño Ramos, Carlos; Serrano Gotarredona, María Teresa; Linares Barranco, Bernabé (IEEE Computer Society, 2011)This paper describes a convolution chip for event-driven vision sensing and processing systems. As opposed to conventional ...
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A calibration technique for very low current and compact tunable neuromorphic cells: Application to 5-bit 20nA DACs
Leñero Bardallo, Juan Antonio; Serrano Gotarredona, María Teresa; Linares Barranco, Bernabé (Institute of Electrical and Electronics Engineers, 2008)Low current applications, like neuromorphic circuits, where operating currents can be as low as a few nanoamperes or less, ...
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A CMOL-Like Memristor-CMOS Neuromorphic Chip-Core Demonstrating Stochastic Binary STDP
Camuñas Mesa, Luis Alejandro; Vianello, Elisa; Reita, Carlo; Serrano Gotarredona, María Teresa; Linares Barranco, Bernabé (Institute of Electrical and Electronics Engineers Inc., 2022-12)The advent of nanoscale memristors raised hopes of being able to build CMOL (CMOS/nanowire/molecular) type ultra-dense ...
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A CMOS analog adaptive BAM with on-chip learning and weight refreshing
Linares Barranco, Bernabé; Sánchez Sinencio, Edgar; Rodríguez Vázquez, Ángel Benito; Huertas Díaz, José Luis (Institute of Electrical and Electronics Engineers, 1993)In this paper we will extend the transconductance-mode (T-mode) approach [1] to implement analog continuous-time neural ...
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A Configurable Event-Driven Convolutional Node with Rate Saturation Mechanism for Modular ConvNet Systems Implementation
Camuñas Mesa, Luis Alejandro; Domínguez Cordero, Yaisel L.; Linares Barranco, Alejandro; Serrano Gotarredona, María Teresa; Linares Barranco, Bernabé (Frontiers Media, 2018)Convolutional Neural Networks (ConvNets) are a particular type of neural network often used for many applications like ...
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A five-decade dynamic-range ambient-light-independent calibrated signed-spatial-contrast AER retina with 0.1-ms latency and optional time-to-first-spike mode
Leñero Bardallo, Juan Antonio; Serrano Gotarredona, María Teresa; Linares Barranco, Bernabé (Institute of Electrical and Electronics Engineers, 2010)Address Event Representation (AER) is an emergent technology for assembling modular multiblock bio-inspired sensory and ...
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Artículo
A general translinear principle for subthreshold MOS transistors
Serrano Gotarredona, María Teresa; Linares Barranco, Bernabé; Andreou, Andreas G. (Institute of Electrical and Electronics Engineers, 1999)This paper revises the conditions under which the translinear principle can be fully exploited for MOS transistors operating ...
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A high-precision current-mode WTA-MAX circuit with multichip capability
Serrano Gotarredona, María Teresa; Linares Barranco, Bernabé (Institute of Electrical and Electronics Engineers, 1998)This paper presents a circuit design technique suitable for the realization of winner-take-all (WTA), maximum (MAX), ...
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A Hybrid CMOS-Memristor Neuromorphic Synapse
Azghadi, Mostafa, R.; Linares Barranco, Bernabé; Abbott, Derek; Leong, Philip H.W. (Institute of Electrical and Electronics Engineers, 2017)Although data processing technology continues to advance at an astonishing rate, computers with brain-like processing ...
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A modified ART 1 algorithm more suitable for VLSI implementations
Serrano Gotarredona, María Teresa; Linares Barranco, Bernabé (Elsevier, 1996)This paper presents a modification to the original ART 1 algorithm (Carpenter and Grossberg, 1987a, A massively parallel ...
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Artículo
A modular T-mode design approach for analog neural network hardware implementations
Linares Barranco, Bernabé; Sánchez Sinencio, Edgar; Rodríguez Vázquez, Ángel Benito; Huertas Díaz, José Luis (Institute of Electrical and Electronics Engineers, 1992)A modular transconductance-mode (T-mode) design approach is presented for analog hardware implementations of neural networks. ...
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Artículo
A neuromorphic cortical-layer microchip for spike-based event processing vision systems
Serrano Gotarredona, Rafael; Serrano Gotarredona, María Teresa; Acosta Jiménez, Antonio José; Linares Barranco, Bernabé (Institute of Electrical and Electronics Engineers, 2006)We present a neuromorphic cortical-layer processing microchip for address event representation (AER) spike-based processing ...
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A precise 90º quadrature OTA-C oscillator tunable in the 50-130-MHz range
Linares Barranco, Bernabé; Serrano Gotarredona, María Teresa; Ramos Martos, J.; Ceballos Cáceres, Joaquín Francisco; Linares Barranco, Alejandro (Institute of Electrical and Electronics Engineers, 2004)We present a very-large-scale integration continuous-time sinusoidal operational transconductance amplifiers quadrature ...
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A Programmable Neural Oscillator Cell
Linares Barranco, Bernabé; Sánchez Sinencio, Edgar; Rodríguez Vázquez, Ángel Benito; Huertas Díaz, José Luis (Institute of Electrical and Electronics Engineers, 1989)A programmable analog neural oscillator cell architecture is presented. The proposed neuron circuit is of hysteretic neural ...
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A programmable VLSI filter architecture for application in real-time vision processing systems
Serrano Gotarredona, María Teresa; Andreou, Andreas G.; Linares Barranco, Bernabé (World Scientific Publishing, 2000)An architecture is proposed for the realization of real-time edge-extraction filtering operation in an Address-Event-Representation ...
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A real-time clustering microchip neural engine
Serrano Gotarredona, María Teresa; Linares Barranco, Bernabé (Institute of Electrical and Electronics Engineers, 1996)This paper presents an analog current-mode VLSI implementation of an unsupervised clustering algorithm. The clustering ...
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A spatial contrast retina with on-chip calibration for neuromorphic spike-based AER vision systems
Costas Santos, Jesús; Serrano Gotarredona, María Teresa; Serrano Gotarredona, Rafael; Linares Barranco, Bernabé (Institute of Electrical and Electronics Engineers, 2007)We present a 32 32 pixels contrast retina microchip that provides its output as an address event representation (AER) ...