Listar Artículos (Instituto de Microelectrónica de Sevilla (IMSE-CNM)) por título
Mostrando ítems 91-110 de 278
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Chaotic image encryption using hopfield and hindmarsh–rose neurons implemented on FPGA
(Multidisciplinary Digital Publishing Institute (MDPI), 2020)Chaotic systems implemented by artificial neural networks are good candidates for data encryption. In this manner, this ...
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Characterization and modeling of piezoelectric integrated micro speakers for audio acoustic actuation
(Hindawi Publishing Corporation, 2011)A study of circular piezoelectric micro speakers is presented for applications in the audio frequency range, including ...
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Characterization-Based Modeling of Retriggering and Afterpulsing for Passively Quenched CMOS SPADs
(Institute of Electrical and Electronics Engineers, 2019)The current trend in the design of systems based on CMOS SPADs is to adopt smaller technological nodes, allowing the ...
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Circuits and Systems Letters: A Novel SC Oscillator
(Institute of Electrical and Electronics Engineers, 1984) -
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Closed-loop Simulation Method for Evaluation of Static Offset in Discrete-Time Comparators
(Institute of Electrical and Electronics Engineers, 2014)This paper presents a simulation-based method for evaluating the static offset in discrete-time comparators. The proposed ...
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CMOS 2.4μm chaotic oscillator: Experimental verification of chaotic encryption of audio
(Institution of Engineering and Technology, 1996)The Letter reports the first experimental verification of chaotic encryption of audio using custom monolithic chaotic ...
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CMOS optical-sensor array with high output current levels and automatic signal-range centring
(Institution of Engineering and Technology, 1994)A CMOS compatible photosensor with high output current levels, and an area-efficient scheme for automatic signal-range ...
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CMOS OTA-C high-frequency sinusoidal oscillators
(Institute of Electrical and Electronics Engineers, 1991)Several topology families are given to implement practical CMOS sinusoidal oscillators by using operational transconductance ...
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CMOS-3D smart imager architectures for feature detection
(Institute of Electrical and Electronics Engineers, 2012)This paper reports a multi-layered smart image sensor architecture for feature extraction based on detection of interest ...
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Compact CMOS active quenching/recharge circuit for SPAD arrays
(Wiley-Blackwell, 2016)Avalanche diodes operating in Geiger mode are able to detect single photon events. They can be employed to photon counting ...
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Compact low-power calibration mini-DACs for neural arrays with programmable weights
(Institute of Electrical and Electronics Engineers, 2003)This paper considers the viability of compact low-resolution low-power mini digital-to-analog converters (mini-DACs) for ...
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Compact Real-Time Inter-Frame Histogram Builder for 15-Bits High-Speed ToF-Imagers Based on Single-Photon Detection
(Institute of Electrical and Electronics Engineers, 2019)Time-of-flight (ToF) image sensors based on single-photon detection, i.e., SPADs, require some filtering of pixel readings. ...
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Comparative Analysis of Projected Tunnel and CMOS Transistors for Different Logic Application Areas
(Institute of Electrical and Electronics Engineers, 2016)In this paper, five projected tunnel FET (TFET) technologies are evaluated and compared with MOSFET and FinFET transistors ...
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Comparison between frame-constrained fix-pixel-value and frame-free spiking-dynamic-pixel convNets for visual processing
(Frontiers Media, 2012)Most scene segmentation and categorization architectures for the extraction of features in images and patches make exhaustive ...
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Comparison of TFETs and CMOS using optimal design points for power-speed trade-offs
(Institute of Electrical and Electronics Engineers, 2017)Tunnel transistors are one of the most attractive steep subthreshold slope devices currently being investigated as a means ...
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Compensation of PVT Variations in ToF Imagers with In-Pixel TDC
(MDPI, 2017)The design of a direct time-of-flight complementary metal-oxide-semiconductor (CMOS) image sensor (dToF-CIS) based on a ...
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Compressive Imaging Using RIP-Compliant CMOS Imager Architecture and Landweber Reconstruction
(Institute of Electrical and Electronics Engineers, 2020)In this paper, we present a new image sensor architecture for fast and accurate compressive sensing (CS) of natural images. ...
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Context-dependent transformation of Pareto-optimal performance fronts of operational amplifiers
(Springer, 2012)The use of Pareto-optimal performance fronts in emerging design methodologies for analog integrated circuits is a keystone ...
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Current-mode fully-programmable piece-wise-linear block for neuro-fuzzy applications
(Institute of Electrical and Electronics Engineers, 2002)A new method to implement an arbitrary piece-wise-linear characteristic in current mode is presented. Each of the breaking ...
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Current-Mode Techniques for the Implementation of Continuous- and Discrete-Time Cellular Neural Networks
(Institute of Electrical and Electronics Engineers, 1993)This paper presents a unified, comprehensive approach to the design of continuous-time (CT) and discrete-time (DT) ...