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Mostrando ítems 31-40 de 56
Artículo
Highly Linear 2,5-V CMOS ΣΔ Modulator for ADSL+
(Institute of Electrical and Electronics Engineers, 2004)
We present a 90-dB spurious-free dynamic range sigma–delta modulator (ΣΔM) for asymmetric digital subscriber line applications (both ADSL and ADSL+), with up to a 4.4-MS/s digital output rate. It uses a cascade (MASH) ...
Ponencia
A Sub-µW Reconfigurable Front-End for Invasive Neural Recording
(Institute of Electrical and Electronics Engineers, 2019)
This paper presents a sub-μW ac-coupled reconfigurable front-end for the purpose of neural recording. The proposed topology embeds in it filtering capabilities allowing it to select among different frequency bands inside ...
Artículo
Matrix Methods for the Dynamic Range Optimization of Continuous-TimeGm-CFilters
(Institute of Electrical and Electronics Engineers, 2008)
This paper presents a synthesis procedure for the optimization of the dynamic range of continuous-time fully differential G m - C filters. Such procedure builds up on a general extended state-space system representation ...
Ponencia
An auto-calibrated neural spike recording channel with feature extraction capabilities
(The International Society for Optics and Photonics, 2011)
This paper presents a power efficient architecture for a neural spike recording channel. The channel offers a selfcalibration operation mode and can be used both for signal tracking (to raw digitize the acquired neural ...
Ponencia
A High TCMRR, Inherently Charge Balanced Bidirectional Front-End for Multichannel Closed-Loop Neuromodulation
(Institute of Electrical and Electronics Engineers, 2019)
This paper describes a multichannel bidirectional front-end for implantable closed-loop neuromodulation. Stimulation artefacts are reduced by way of a 4-channel H-bridge current source sharing stimulator front-end that ...
Ponencia
Secure communication through switched-current chaotic circuits
(Institute of Electrical and Electronics Engineers, 1995)
This paper presents the use of analog integrated circuits for secure communication based on chaos synchronization. The phenomenon is demonstrated through experimental measurements realized on silicon prototypes in a ...
Ponencia
System-level optimization of baseband filters for communication applications
(The International Society for Optical Engineering - SPIE, 2003)
In this paper, a design approach for the high-level synthesis of programmable continuous-time baseband filters able to achieve optimum trade-off among dynamic range, distortion behavior, mismatch tolerance and power area ...
Ponencia
A power efficient neural spike recording channel with data bandwidth reduction
(Institute of Electrical and Electronics Engineers, 2011)
This paper presents a mixed-signal neural spike recording channel which features, as an added value, a simple and low-power data compression mechanism. The channel uses a band-limited differential low noise amplifier and ...
Ponencia
Mixed-signal quadratic operators for the feature extraction of neural signals
(Institute of Electrical and Electronics Engineers, 2016)
This paper presents design principles for reusing charge-redistribution SAR ADCs as digital multipliers. This is illustrated with an 8-b fully-differential rail-to-rail SAR ADC/multiplier, designed in a 180 nm HV CMOS ...
Ponencia
A Sub-μVRms Chopper Front-End for ECoG Recording
(Institute of Electrical and Electronics Engineers, 2019)
This paper presents a low-noise, low-power fully differential chopper-modulated front-end circuit intended for ECoG signal recording. Among other features, it uses a subthreshold source-follower biquad in the forward path ...