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Ponencia
Analog neural networks for real-time constrained optimization
(Institute of Electrical and Electronics Engineers, 1990)
Architectures and circuit techniques for implementing general piecewise constrained optimization problems using VLSI techniques are explored. Discrete-time analog techniques are considered due to their inherent accuracy, ...
Ponencia
Architectures and building blocks for CMOS VLSI analog "neural" programmable optimizers
(Institute of Electrical and Electronics Engineers, 1992)
A modular reconfigurable serial architecture is presented for the analog/digital implementation of constrained optimization algorithms with digital programmability of the problem weights. Area overhead due to programmability ...
Ponencia
Analog integrated neural-like circuits for nonlinear programming
(Institute of Electrical and Electronics Engineers, 1989)
A systematic approach for the design of analog neural nonlinear programming solvers using switched-capacitor (SC) integrated circuit techniques is presented. The method is based on formulating a dynamic gradient system ...
Artículo
Analog Neural Programmable Optimizers in CMOS VLSI Technologies
(Institute of Electrical and Electronics Engineers, 1992)
A 3-μm CMOS IC is presented demonstrating the concept of an analog neural system for constrained optimization. A serial time-multiplexed general-purpose architecture is introduced for the real-time solution of this kind ...
Artículo
Smart-Pixel Cellular Neural Networks in Analog Current-Mode CMOS Technology
(Institute of Electrical and Electronics Engineers, 1994)
This paper presents a systematic approach to design CMOS chips with concurrent picture acquisition and processing capabilities. These chips consist of regular arrangements of elementary units, called smart pixels. Light ...