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Mostrando ítems 11-20 de 22
Ponencia
A basic building block approach to CMOS design of analog neuro/fuzzy systems
(Institute of Electrical and Electronics Engineers, 1994)
Outlines a systematic approach to design fuzzy inference systems using analog integrated circuits in standard CMOS VLSI technologies. The proposed circuit building blocks are arranged in a layered neuro/fuzzy architecture ...
Artículo
A modular T-mode design approach for analog neural network hardware implementations
(Institute of Electrical and Electronics Engineers, 1992)
A modular transconductance-mode (T-mode) design approach is presented for analog hardware implementations of neural networks. This design approach is used to build a modular bidirectional associative memory network. The ...
Artículo
A Programmable Neural Oscillator Cell
(Institute of Electrical and Electronics Engineers, 1989)
A programmable analog neural oscillator cell architecture is presented. The proposed neuron circuit is of hysteretic neural nature with its implementation based on operational transconductance amplifiers (OTA's). The ...
Ponencia
VLSI implementation of a transconductance mode continuous BAM with on chip learning and dynamic analog memory
(Institute of Electrical and Electronics Engineers, 1991)
In this paper we present a complete VLSI Continuous-Time Bidirectional Associative Memory (BAM). The short term memory (STM) section is implemented using small transconductance four quadrant multipliers, and capacitors for ...
Ponencia
Frequency tuning loop for VCOs
(Institute of Electrical and Electronics Engineers, 1991)
A frequency tuning circuit is introduced for VCOs (voltage-controlled oscillators) so that the final relationship between oscillating frequency and input control voltage is fixed and independent of nonidealities. This ...
Artículo
CMOS OTA-C high-frequency sinusoidal oscillators
(Institute of Electrical and Electronics Engineers, 1991)
Several topology families are given to implement practical CMOS sinusoidal oscillators by using operational transconductance amplifier-capacitor (OTA-C) techniques. Design techniques are proposed taking into account the ...
Ponencia
A Model for VLSI implementation of CNN image processing chips using current-mode techniques
(Institute of Electrical and Electronics Engineers, 1993)
A new Cellular Neural Network model is proposed which allows simpler and faster VLSI implementation than previous models. Current-mode building blocks are presented for the design of CMOS image preprocessing chips (feature ...
Ponencia
A novel CMOS analog neural oscillator cell
(Institute of Electrical and Electronics Engineers, 1989)
A very flexible programmable CMOS analog neural oscillator cell architecture is presented. The proposed neuron circuit architecture is a hysteretic neural-type pulse oscillator. Its implementation consists of a transconductance ...
Ponencia
Very high frequency CMOS OTA-C quadrature oscillators
(Institute of Electrical and Electronics Engineers, 1990)
An approach to the design of high-frequency monolithic voltage-controlled oscillators using operational transconductance amplifiers and capacitors is given. Results from two 3 μm CMOS prototypes are presented. Both frequency ...
Ponencia
CMOS circuit implementations for neuron models
(Institute of Electrical and Electronics Engineers, 1990)
The mathematical neuron basic cells used as basic cells in popular neural network architectures and algorithms are discussed. The most popular neuron models (without training) used in neural network architectures and ...