Ponencia
Compact Calibration Circuit for Large Neuromorphic Arrays
Autor/es | Leñero Bardallo, Juan Antonio
Serrano Gotarredona, María Teresa Linares Barranco, Bernabé |
Departamento | Universidad de Sevilla. Departamento de Arquitectura y Tecnología de Computadores Universidad de Sevilla. Departamento de Electrónica y Electromagnetismo |
Fecha de publicación | 2008 |
Fecha de depósito | 2020-10-16 |
Publicado en |
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ISBN/ISSN | 978-1-4244-1683-7 0271-4302 |
Resumen | Low current applications, like neuromorphic circuits,
where operating currents can be as low as few
nano amps or less, suffer from huge transistor mismatches,
resulting in around or less than 1-bit precision.
Here we ... Low current applications, like neuromorphic circuits, where operating currents can be as low as few nano amps or less, suffer from huge transistor mismatches, resulting in around or less than 1-bit precision. Here we present a new calibration approach based on individually calibratable current sources made with MOS transistors of digitally adjustable length, which require only N unit transistors. The scheme includes a translinear circuit based tuning scheme, which allows to expand the operating range of the calibrated circuits with graceful precision degradation, over 4 decades of operating currents. Experimental results are provided for 5-bit resolution DACs operating at 20nA. |
Agencias financiadoras | Ministerio de Educación y Ciencia (MEC). España Junta de Andalucía |
Identificador del proyecto | TEC2006-11730-C03-01
P06-TIC-01417 |
Cita | Leñero Bardallo, J.A., Serrano Gotarredona, M.T. y Linares Barranco, B. (2008). Compact Calibration Circuit for Large Neuromorphic Arrays. En ISCAS 2008: IEEE International Symposium on Circuits and Systems (1776-1779), Seattle, WA, USA: IEEE Computer Society. |
Ficheros | Tamaño | Formato | Ver | Descripción |
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Compact calibration circuit.pdf | 258.2Kb | [PDF] | Ver/ | |