Perfil del autor: Rosa Utrera, José Manuel de la
Datos institucionales
| Nombre | Rosa Utrera, José Manuel de la |
| Departamento | Electrónica y Electromagnetismo |
| Área de conocimiento | Electrónica |
| Categoría profesional | Catedrático de Universidad |
| Correo electrónico | Solicitar |
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Estadísticas
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Nº publicaciones
99
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Nº visitas
7791
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Nº descargas
8022
| Publicaciones |
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Artículo
 On the Use of FIR Feedback in Bandpass Delta-Sigma Modulators
(IEEE, 2024)
This paper presents a new architecture for bandpass delta-sigma modulators (BP ΔΣ Ms) featuring finite impulse response ... |
Artículo
Design Automation of Analog and Mixed-Signal Circuits Using Neural Networks – A Tutorial Brief
(IEEE, 2024)
This tutorial brief shows how Artificial Neural Networks (ANNs) can be used for the optimization and automated design of ... |
Artículo
On the Use of Artificial Neural Networks for the Automated High-Level Design of ΣΔ Modulators
(IEEE, 2024)
This paper presents a high-level synthesis method ology for Sigma-Delta Modulators (Σ∆Ms) that combines be havioral modeling ... |
Trabajo Fin de Máster
Uso de herramientas de código abierto para el diseño de circuitos y sistemas integrados analógicos, digitales y de señal mixta
(2023)
Este trabajo de fin de master realiza una investigación de proyectos, entornos y herramientas de relevancia en el mundo ... |
Artículo
Combining Software-Defined Radio Learning Modules and Neural Networks for Teaching Communication Systems Courses †
(Multidisciplinary Digital Publishing Institute (MDPI), 2023)
The paradigm known as Cognitive Radio (CR) proposes a continuous sensing of the electromagnetic spectrum in order to ... |
Artículo
 Ultra-High-Resistance Pseudo-Resistors With Small Variations in a Wide Symmetrical Input Voltage Swing
(Institute of Electrical and Electronics Engineers, 2023)
This brief presents a new strategy and circuit configuration composed of serially-connected PMOS devices operating in the ... |
Trabajo Fin de Máster
Validación del flujo de diseño de sistemas on-chip basados en RISC-V mediante herramientas de código abierto dentro del programa chipIgnite de eFabless
(2023)
Este trabajo se ha elaborado con el propósito de facilitar el acceso de nuevos usuarios al desarrollo de circuitos ... |
Artículo
AI-Assisted Sigma-Delta Converters. Application to Cognitive Radio
(Institute of Electrical and Electronics Engineers, 2022)
This brief discusses the use of Artificial Intelligence (AI) to manage the operation and improve the performance of ... |
Trabajo Fin de Grado
Aplicaciones de redes neuronales artificiales al paradigma de radio-cognitiva
(2022)
En este documento se recoge el trabajo de recogida de información e investigación para ser capaz y llevar a cabo la ... |
Artículo
AI-managed cognitive radio digitizers
(Institute of Electrical and Electronics Engineers, 2022)
Embedding Artificial Intelligence (AI) in integrated circuits is one of the technology pillars of the so-called digital ... |
Ponencia
Implementation of binary stochastic STDP learning using chalcogenide-based memristive devices
(IEEE, 2021)
The emergence of nano-scale memristive devices encouraged many different research areas to exploit their use in multiple ... |
Tesis Doctoral
Analog-to-Digital Converters for Efficient Portable Devices
(2021)
La transformación digital en la que se encuentra inmersa nuestra sociedad no hubiese sido posible sin el desarrollo ... |
Trabajo Fin de Máster
Time series forecasting with deep learning for cognitive-radio applications
(2021)
We live in a world where the number of devices that are constantly communicating with each other are growing exponentially, ... |
Artículo
Reducing the nonlinearity and harmonic distortion in FD-SOI CMOS current-starved inverters and VCROs
(Elsevier, 2021)
This paper demonstrates experimentally how to reduce the nonlinearity of some analog and mixed-signal circuits by using ... |
| Trabajo Fin de Grado |
| Trabajo Fin de Grado |
Ponencia
Experimental Body-input Three-stage DC offset Calibration Scheme for Memristive Crossbar
(IEEE, 2020)
Reading several ReRAMs simultaneously in a neuromorphic circuit increases power consumption and limits scalability. Applying ... |
Artículo
Enhanced Linearity in FD-SOI CMOS Body-Input Analog Circuits - Application to Voltage-Controlled Ring Oscillators and Frequency-Based sigma Delta ADCs
(Institute of Electrical and Electronics Engineers, 2020)
Abstract— This paper investigates the use of the body terminal of MOS transistors to improve the linearity of some key ... |
Artículo
A 10-MHz BW 77.3-dB SNDR 640-MS/s GRO-Based CT MASH Delta Sigma Modulator
(Institute of Electrical and Electronics Engineers, 2020)
We present in this brief a novel multi-stage noiseshaping (MASH) 3-1 continuous-time (CT) delta-sigma modulator (M) with ... |
Trabajo Fin de Máster
Aplicación de sistemas neuromórficos con aprendizaje profundo para sistemas de comunicación basados en radio cognitiva
(2020)
Una de las principales limitaciones para la implantación práctica de dispositivos IoT (Internet Of Things) se encuentra ... |
Artículo
A 2-MS/s, 11.22 ENOB, Extended Input Range SAR ADC With Improved DNL and Offset Calculation
(Institute of Electrical and Electronics Engineers, 2018)
Abstract— A 12-bit successive approximation register analogto-digital converter (ADC) with extended input range is presented. ... |
Artículo
A 0.9-V 100-mu W Feedforward Adder-Less Inverter-Based MASH Delta Sigma Modulator With 91-dB Dynamic Range and 20-kHz Bandwidth
(Institute of Electrical and Electronics Engineers, 2018)
A 0.9-V ΔΣ modulator integrated into a 0.18-μm CMOS technology for digitizing signals in low-power devices is presented ... |
Artículo
Methodology to improve the model of series inductance in CMOS integrated inductors
(Slovak Technical University, 2018)
This paper presents a systematic optimization methodology to achieve an accurate estimation of series inductance of ... |
Artículo
Embedding MATLAB Optimizers in SIMSIDES for the High-Level Design of Sigma Delta Modulators
(Institute of Electrical and Electronics Engineers, 2018)
This brief shows how to combine SIMSIDES, a SIMULINK-based time-domain behavioral simulator, with different optimization ... |
Artículo
Novel Multiplierless Wideband Comb Compensator with High Compensation Capability
(Springer, 2017)
This paper proposes a novel multiplierless comb compensation filter, which has the absolute passband deviation less than ... |
Artículo
SMASH ΔΣ modulator with adderless feed-forward loop filter
(Wiley-Blackwell, 2017)
A novel cascade ΔΣ modulator, which combines the benefits of sturdy MASH (SMASH) topology and feed-forward loop filter, ... |
Ponencia
Design of a power-efficient widely-programmable Gm-LC band-pass sigma-delta modulator for SDR
(Institute of Electrical and Electronics Engineers, 2016)
This paper presents the design and implementation of a fourth-order band-pass continuous-time modulator intended for ... |
Ponencia
Overview of carbon-based circuits and systems
(Institute of Electrical and Electronics Engineers, 2015)
This paper presents an overview of the state of the art on carbon-based circuits and systems made up of carbon nanotubes ... |
Artículo
A fast readout electronic system for accurate spatial detection in ion beam tracking for the next generation of particle accelerators
(Institute of Electrical and Electronics Engineers Inc, 2015)
This paper presents the design, implementation, and measurements of a complete electronic frontend intended for high-resolution ... |
Tesis Doctoral
Sistema electrónico de lectura para el trazado espacial de haces de partículas de futuros aceleradores
(2014)
This work presents the design, implementation and measurements of a complete electronic front-end intended for high-resolution ... |
Artículo
Efficient Hybrid Continuous-Time/Discrete-Time Cascade Modulators for Wideband Applications
(Elsevier, 2014)
This paper analyses the use of hybrid continuous-time/discrete-time cascade ΣΔ modulators for the implementation of ... |
Tesis Doctoral
Una Contribución al Diseño de Moduladores Sigma-Delta en Cascada Realizados Mediante Técnicas de Circuito en Tiempo Continuo
(2012)
Esta tesis doctoral es el resultado de un conjunto de trabajos de investigación encaminados a sistematizar y optimizar el ... |
Ponencia
Design issues and experimental characterization of a continuously-tuned adaptive CMOS LNA
(2010)
This paper presents the design implementation and experimental characterization of an adaptive Low Noise Amplifier (LNA) ... |
Artículo
Design of an adaptive LNA for hand-held devices in a 1-V 90-nm standard RF CMOS technology: From circuit analysis to layout
(Universidad Nacional Autónoma de México, 2009)
This paper deals the design of a reconfigurable Low-Noise Amplifier (LNA) for the next generation of wireless hand-held ... |
Artículo
Resonation-based hybrid continuous-time/discrete-time cascade ΣΔ modulators: application to 4G wireless telecom
(Society of Photo-Optical Instrumentation Engineers, 2009)
This paper presents innovative architectures of hybrid Continuous-Time/Discrete-Time (CT/DT) cascade ΣΔ Modulators (ΣΔMs) ... |
Ponencia
A new reconfigurable cascade ΣΔ modulator architecture with inter-stage resonation and no digital cancellation logic
(2009)
This paper presents a new two-stage cascade ΣΔ modula- tor architecture that uses inter-stage resonation to increase its ... |
Artículo
Resonation-based cascade ΣΔ modulator for broadband low-voltage A/D conversion
(Institute of Electrical and Electronics Engineers, 2008)
cascades while presenting very relaxed output swing requirements and, subsequently, high robustness to non-linearities of ... |
| Artículo |
Artículo
Design of a 1-V 90-nm CMOS adaptive LNA for multi-standard wireless receivers
(Sociedad Mexicana de Física, 2008)
This paper presents the design of a reconfigurable Low-Noise Amplifier (LNA) for the next generation of wireless hand-held ... |
Ponencia
A novel low-voltage reconfigurable ΣΔ modulator for 4G wireless receivers
(2008)
This paper presents a new adaptable cascade ΣΔ modulator architecture fo r low-voltage multi-stan- dard applications. It ... |
Ponencia
Design of a 130-nm CMOS Reconfigurable Cascade ΣΔ Modulator for GSM/UMTS/Bluetooth
(Institute of Electrical and Electronics Engineers, 2007)
This paper reports a 130-nm CMOS programmable cascade ΣΔ modulator for multistandard wireless terminals, covering three ... |
Artículo
Novel topologies of cascade ΣΔ modulators for low-voltage wideband applications
(2007)
This work presents two novel topologies of cascade ΣΔ modulators with unity signal transfer function that ... |
Ponencia
Resonation-based Cascade ΣΔ Modulators for High-Linearity Broadband A/D Conversion
(2007)
This paper presents two new architectures of cascade ΣΔ modulators that, based on the use of resonation, allow to increase ... |
Ponencia
A 12-bit@40MS/s Gm-C Cascade 3-2 Continuous-Time Sigma-Delta Modulator
(Institute of Electrical and Electronics Engineers, 2007)
This paper reports the transistor-level design of a 130-nm CMOS continuous-time cascade ΣΔ modulator. The modulator topology, ... |
Artículo
A design tool for high-resolution high-frequency cascade continuous- time Σ∆ modulators
(SPIE, 2007)
This paper introduces a CAD methodology to assist the de signer in the implementation of continuous-time (CT) cas- cade ... |
Ponencia
Design of a 1.2-V Cascade Continuous-Time Sigma-Delta Modulator for Broadband Telecommunications
(Institute of Electrical and Electronics Engineers, 2006)
This paper presents the design of a continuous-time multibit cascade 2-2-1 sigma-delta modulator for broadband telecom systems. |
Ponencia
Reconfiguration of Cascade ΣΔ Modulators for Multistandard GSM/Bluetooth/UIMTS/WLAN Transceivers
(Institute of Electrical and Electronics Engineers, 2006)
This paper presents design considerations for cascade Sigma-Delta Modulators (ΣΔMs) included in multi-standard wireless ... |
Ponencia
Design of a 1.2-V 130nm CMOS 13-bit@40MS/s Cascade 2-2-1 Continuous-Time ΣΔ Modulator
(Institute of Electrical and Electronics Engineers, 2006)
This paper presents the design of a continuous- time multibit cascade 2-2-1 ΣΔ modulator for broadband telecom systems. ... |
Artículo
A new high-level synthesis methodology of cascaded continuous-time ΣΔ modulators
(Institute of Electrical and Electronics Engineers, 2006)
This brief presents an efficient method for synthesizing cascaded sigma–delta modulators implemented with continuous-time ... |
Ponencia
Behavioral Modeling, Simulation and High-Level Synthesis of Pipeline A/D Converters
(2005)
This paper presents a MATLAB® toolbox for the time-domain simulation and high-level sizing of pipeline analog-to-digital ... |
Ponencia
Design Considerations for Multistandard Cascade ΣΔ Modulators
(2005)
This paper discusses design considerations for cascade Sigma-Delta Modulators (ΣΔMs) included in multistandard wireless ... |
Artículo
A CMOS 110-dB@40-kS/s programmable-gain chopper-stabilized third-order 2-1 cascade sigma-selta modulator for low-power high-linearity automotive aensor ASICs
(Institute of Electrical and Electronics Engineers, 2005)
This paper describes a 0.35-μm CMOS chopper-stabilized switched-capacitor 2-1 cascade ΣΔ modulator for automotive sensor ... |
Ponencia
A 0.13μm CMOS current steering D/A converter for PLC and VDSL applications
(2005)
This paper describes the design of a 12-bit 80MS/s Digital-to-Analog converter implemented in a 0.13μm CMOS logic technology. ... |
Artículo
High-level synthesis of switched-capacitor, switched-current and continuous-time ΣΔ modulators using SIMULINK-based time-domain behavioral models
(Institute of Electrical and Electronics Engineers, 2005)
This paper presents a high-level synthesis tool for ΣΔ Modulators (ΣΔMs) that combines an accurate SIMULINK-based time-domain ... |
Ponencia
Continuous-time cascaded ΣΔ modulators for VDSL: A comparative study
(The International Society for Optical Engineering - SPIE, 2005)
This paper describes new cascaded continuous-time ΣΔ modulators intended to cope with very high-rate digital subscriber ... |
Ponencia
Effect of Clock Jitter Error on the Performance Degradation of Multi-bit Continuous-Time ΣΔ Modulators With NRZ DAC
(2005)
This paper analyses the effect of the clock jitter error in multi-bit continuous-time ΣΔ modulators with non-return-to-zero ... |
Ponencia
Design and electrical implementation of a 1.8-V multistandard switched-current ΣΔ modulator
(2005)
This paper describes the design and electrical implementation of a 1.8-V, 0.18mm CMOS reconfigurable switched-current SD ... |
Ponencia
A Direct Synthesis Method of Cascaded Continuous-Time Sigma-Delta Modulators
(2005)
This paper presents an efficient method to synthesize cascaded sigma-delta modulators implemented with continuous-time ... |
Ponencia
Analysis of Clock Jitter Error in Multibit Continuous-Time ΣΔ modulators with NRZ Feedback Waveform
(Institute of Electrical and Electronics Engineers, 2005)
This paper presents a detailed study of the clock jitter error in multibit continuous-time ΣΔ modulators with non-return-to-zero ... |
Ponencia
Simulation-based high-level synthesis of Nyquist-rate data converters using MATLAB/SIMULINK
(The International Society for Optical Engineering - SPIE, 2005)
This paper presents a toolbox for the simulation, optimization and high-level synthesis of Nyquist-rate Analog-to-Digital ... |
Ponencia
An Embedded 12-bit 80MS/s A/D/A Interface for Power-Line Communications in 0.13μm Pure Digital CMOS Technology
(Institute of Electrical and Electronics Engineers, 2005)
This paper presents an embedded interface, comprising both A/D and D/A converters, which has been implemented in a 0.13μm ... |
Ponencia
A 0.35 μm CMOS 17-bit@40-kS/s cascade 2-1 ΣΔ modulator with programmable gain and programmable chopper stabilization
(The International Society for Optical Engineering - SPIE, 2005)
This paper describes a 0.35μm CMOS chopper-stabilized Switched-Capacitor 2-1 cascade ΣDelta; modulator for automotive ... |
Ponencia
MATLAB/SIMULINK-Based High-Level Synthesis of Discrete-Time and Continuous-Time Sigma-Delta Modulators
(Institute of Electrical and Electronics Engineers, 2004)
This paper describes a tool that combines an accurate SIMULINK-based time-domain behavioural simulator with a statistical ... |
Ponencia
A 0.35μm CMOS 17-bit@40kS/s Sensor A/D Interface Based on a Programmable-Gain Cascade 2-1 ΣΔ Modulator
(Institute of Electrical and Electronics Engineers, 2004)
This paper describes the design and electrical implementation of an A/D interface for sensor applications realized in a ... |
Ponencia
An Optimization-based Tool for the High-Level Synthesis of Discrete-time and continuous-Time Sigma-Delta Modulators in the MATLAB/SIMULINK Environment
(Institute of Electrical and Electronics Engineers, 2004)
This paper presents a MATLAB toolbox for the automated high-level sizing of ΣΔ Modulators (ΣΔMs) based on the combination ... |
Ponencia
Simulation-based High-level Synthesis of Pipeline Analog-to-Digital Converters
(2004)
This paper presents a toolbox for the time-domain simulation and optimization-based high-level synthesis of pipeline ... |
Artículo
Highly Linear 2,5-V CMOS ΣΔ Modulator for ADSL+
(Institute of Electrical and Electronics Engineers, 2004)
We present a 90-dB spurious-free dynamic range sigma–delta modulator (ΣΔM) for asymmetric digital subscriber line applications ... |
Ponencia
An Alternative DfT Methodology to Test High-Resolution ΣΔ Modulators
(Institute of Electrical and Electronics Engineers, 2004)
In this paper, a novel DfT methodology to test high-resolution ΣΔ Modulators (ΣΔM) is introduced. The aim of the proposal ... |
Artículo
Analysis of error mechanisms in switched-current Sigma-Delta modulators
(Springer, 2004)
This paper presents a systematic analysis of the major switched-current (SI) errors and their influence on the performance ... |
Ponencia
Design Considerations for an Automotive Sensor Interface Sigma-Delta Modulator
(Institute of Electrical and Electronics Engineers, 2003)
The Sigma-Delta Modulator presented in this paper contains a programmable-gain input inferface to accommodate the output ... |
Ponencia
Expandible high-order cascade ya modulator with constant, reduced systematic loss of resolution
(Institute of Electrical and Electronics Engineers, 2003)
An arbitrary order sigma-delta modulator cascude architecture is presented with only I-bit loss of resolution due to scaling ... |
Ponencia
A SIMULINK-based approach for fast and precise simulation of switched-capacitor, switched-current and continuous-time /spl Sigma//spl Delta/ modulators
(Institute of Electrical and Electronics Engineers, 2003)
This paper describes how to extend the capabilities of SIMULINK for the time-domain simulation of /spl Sigma//spl Delta/ ... |
Ponencia
A ΣΔ modulator for a programmable-gain, low-power, high-linearity automotive sensor interface
(The International Society for Optical Engineering - SPIE, 2003)
This paper describes the design and electrical implementation of a 0.35μm CMOS 17-bit≰0kS/s Sigma-Delta Modulator (ΣΔM) ... |
Ponencia
A 2.5-V CMOS Wideband Sigma-Delta Modulator
(Institute of Electrical and Electronics Engineers, 2003)
A high-performance Sigma-Delta modulator for wireline communication applications is presenfed It employs a 4th-order cascade ... |
Capítulo de Libro
BandPass Sigma-Delta Analog-to-Digital Converters
(Springer, 2003)
The principle of ΣΔ Modulation (ΣΔM) is extended in BPΣΔMs to bandpass signals, especially but not only, with a narrow ... |
Ponencia
A 2.5-V ΣΔ modulator in 0.25-um CMOS for ADSL
(Institute of Electrical and Electronics Engineers, 2002)
This paper presents a dual-quantization SC Sigma-Delta Modulator intended for A/D Conversion in ADSL applications. |
Ponencia
Analysis and Experimental Characterization of Idle Tones in 2nd-Order Bandpass Sigma-Delta Modulators - A 0.8μm CMOS Switched-Current Case Study
(Institute of Electrical and Electronics Engineers, 2001)
Ths paper analyses the tonal behaviour of the quantization noise in 2nd-order bandpass SD modulators. The analysis previously ... |
Ponencia
Effect of Non-Linear Settling Error on The Harmonic Distortion of Fully-Differential Switched-Current BandPass Sigma-Delta Modulators
(Institute of Electrical and Electronics Engineers, 2001)
This paper presents a detailed study of the effect of the non-linear settling on the harmonic distortion of BandPass SD ... |
Ponencia
Analysis and Modeling of the Non-Linear Sampling Process in Switched-Current Circuits - Application to Bandpass Sigma-Delta Modulators
(2001)
This paper presents a precise model for the transient behaviour of Fully Differential (FD) SwItched-current (SI) memory ... |
Ponencia
High-performance ΣΔ ADC for ADSL applications in 0.35μm CMOS digital technology
(Institute of Electrical and Electronics Engineers, 2001)
We present a ΣΔ modulator designed for ADSL applications in a 0.3Sμm CMOS pure digital technology. It employs a 4th-order ... |
Ponencia
Study of Non-Linear S/H Operation in Switched-Current Circuits Using Volterra Series - Application to BandPass Sigma-Delta Modulators
(2001)
This paper analyses the transient behaviour of SwItched-current (SI) memory cells placed at the front-end of high-speed ... |
Ponencia
Top-Down Design of a xDSL 14-bit 4MSh ZA Modulator in Digital CMOS Technology
(Institute of Electrical and Electronics Engineers, 2001)
This paper describes the design of a Sigma-Delta modulator aimed for A/D conversion in xDSL applications, featuring ... |
Ponencia
Experimental Characterization of IdleTones in Second-Order Bandpass ΣΔ Modulators
(2000)
This paper analyses the tonal behaviour of the quantization noise in second-order bandpass ΣΔ modulators. The analysis ... |
Ponencia
A 14-bit 4-MS/s Multi-bit Cascade Sigma-Delta Modulator in CMOS 0.35-um Digital Technology
(2000)
This paper presents a 4th-order 3-stage cascade SD modulator that achieves 14-bit dynamic range at 4MS/s using low ... |
Artículo
A CMOS 0.8- µm transistor-only 1.63-MHz switched-current bandpass ΣΔ modulator for AM signal A/D conversion
(Institute of Electrical and Electronics Engineers, 2000)
This paper presents a CMOS 0.8-/spl mu/m switched-current (SI) fourth-order bandpass /spl Sigma//spl Delta/ modulator ... |
Ponencia
Selection of test techniques for high-resolution ΣΔ modulators
(2000)
This paper introduces a new tool which allows the evaluation of different test techniques in a complete impartial manner. ... |
Ponencia
Reliable analysis of settling errors in SC integrators - application to high-speed low-power ΣΔ modulators design
(1999)
This paper presents a detailed study on the transient response of SC integrators taking into account the effects of amplifier ... |
Ponencia
Harmonic Distortion in Fully-Differential Switched-Current Sigma-Delta Modulators
(1999)
This paper presents a systematic analysis of the harmonic distortion in SD modulators (SDMs) implemented with fully-differential ... |
Ponencia
Non-ideal quantization noise shaping in switched-current bandpass ΣΔ modulators
(Institute of Electrical and Electronics Engineers, 1999)
This paper presents a systematic analysis of the major switched-current (SI) errors and their influence on the quantization ... |
Artículo
Multi-bit cascade ΣΔ modulator for high-speed A/D conversion with reduced sensitivity to DAC errors
(Institute of Electrical and Electronics Engineers, 1998)
This paper presents a ΣΔ modulator (ΣΔM) which combines single-bit and multi-bit quantization in a cascade architecture ... |
Artículo
A CMOS 0.8 μm fully differential current mode buffer for HF SI circuits
(Elsevier, 1998)
We present a high-frequency fully-differential current-mode buffer to interface off-chip currents with no significant ... |
Artículo
Fourth-order cascade SC ΣΔ modulators: a comparative study
(Institute of Electrical and Electronics Engineers, 1998)
Fourth-order cascade ΣΔ modulators are very well suited for IC implementation using analog sampled-data circuits because ... |
| Ponencia |
Artículo
Using CAD tools for shortening the design cycle of high-performance sigma–delta modulators: A 16·4 bit, 9·6 kHz, 1·71 mW ΣΔM in CMOS 0·7 μm technology
(Wiley-Blackwell, 1997)
This paper uses a CAD methodology proposed by the authors to design a low-power 2nd-order Sigma-Delta Modulator (ΣΔM). ... |
Ponencia
A 2.5MHz 55dB Switched-Current BandPass ΣΔ Modulator for AM Signal Conversion
(Institute of Electrical and Electronics Engineers, 1997)
We present a Switched-Current (SI) fourth-order bandpass ΣΔ modulator IC prototype. It uses fully-differential circuits ... |
Ponencia
Using CAD Tools for the Automatic Design of Low-Power ΣΔ Modulators
(1997)
This paper illustrates the use of a CAD methodology to design a high-resolution 2nd-order ZA modulator with optimized power ... |
Capítulo de Libro
Tools for Automated Design of ΣΔ Modulators
(Springer, 1997)
We present a set of CAD tools to design ΣΔ modulators. They use statistical optimization to calculate optimum specifications ... |
Ponencia
A fourth-order bandpass ΣΔ modulator using current-mode analog/digital circuits
(Institute of Electrical and Electronics Engineers, 1996)
We present a fourth-order bandpass ΣΔ switched-current modulator IC in 0.8 μm CMOS single-poly technology. Its architecture ... |
Ponencia
A CMOS fully-differential bandpass ΣΔ modulator using switched-current circuits
(Institute of Electrical and Electronics Engineers, 1995)
This paper presents a fourth-order bandpass sigma-delta modulator that has been designed using fully-differential ... |