Author profile: Quintana Toledo, José María
Institutional data
Name | Quintana Toledo, José María |
Department | Electrónica y Electromagnetismo |
Knowledge area | Electrónica |
Professional category | Catedrático de Universidad |
Request | |
Statistics
-
No. publications
29
-
No. visits
3554
-
No. downloads
3175
Publications |
---|
Article
Oscillatory Neural Networks Using VO2 Based Phase Encoded Logic
(Frontiers Media, 2021)
Nano-oscillators based on phase-transition materials are being explored for the implementation of different non-conventional ... |
Article
Phase Transition Device for Phase Storing
(IEEE, 2020)
Nano-oscillators based on phase transitions materials (PTM) are being explored for the implementation of different ... |
Article
Experimental Validation of a Two-Phase Clock Scheme for Fine-Grained Pipelined Circuits Based on Monostable to Bistable Logic Elements
(Institute of Electrical and Electronics Engineers, 2014)
Abstract: Research on fine-grained pipelines can be a way to obtain high-performance applications. Monostable to bistable ... |
Article
Novel pipeline architectures based on Negative Differential Resistance devices
(Elsevier, 2013)
Devices exhibiting Negative Differential Resistance (NDR) in their I-V characteristic are attractive from the design point ... |
Presentation
Two-Phase MOBILE Interconnection Schemes for Ultra-Grain Pipeline Applications
(Springer, 2013)
Monostable to Bistable (MOBILE) gates are very suitable for the implementation of gate-level pipelines which can be achieved ... |
Presentation
Bifurcation Diagrams in MOS-NDR Frequency Divider Circuits
(Instituto Nacional de Astrofísica, Óptica y Electrónica; Universidad de Sevilla, 2012)
The behavior of a circuit able to implement frequency division is studied. It is composed of a block with an IV characteristic ... |
Article
Domino inspired MOBILE networks
(Institute of Electrical and Electronics Engineers, 2012)
MOBILE networks can be operated in a gate-level pipelined fashion allowing high through-output. If MOBILE gates are directly ... |
Article
Two-phase RTD-CMOS pipelined circuits
(Institute of Electrical and Electronics Engineers, 2012)
MOnostable-BIstable Logic Element (MOBILE) networks can be operated in a gate-level pipelined fashion (nanopipeline) ... |
PhD Thesis
Diseño lógico de circuitos digitales usando dispositivos con característica NDR
(2011)
En esta tesis doctoral se han desarrollado técnicas de diseño para circuitos electrónicos integrados que empleen dispositivos ... |
Presentation
Efficient realization of RTD-CMOS logic gates
(2011)
The incorporation of Resonant Tunnel Diodes (RTDs) into III/V transistor technologies has shown an improved circuit ... |
Article
RTD-CMOS pipelined networks for reduced power consumption
(Institute of Electrical and Electronics Engineers, 2011)
The incorporation of resonant tunneling diodes (RTDs) into III/V transistor technologies has shown an improved circuit ... |
Article
Improved nanopipelined RTD adder using generalized threshold gates
(Institute of Electrical and Electronics Engineers, 2011)
Many logic circuit applications of Resonant Tunneling Diodes are based on the MOnostable-BIstable Logic Element (MOBILE). ... |
Article
Simplified single-phase clock scheme for MOBILE networks
(Institute of Electrical and Electronics Engineers, 2011)
MOBILE networks can be operated in a gate-level pipelined fashion allowing high through-output. If MOBILE gates are directly ... |
Presentation
Redes MOBILE MOS-NDR operando con reloj de una fase
(2010)
La existencia de dispositivos con una característica I-V que exhibe una resistencia diferencial negativa (Negative ... |
Article
Efficient realisation of MOS-NDR threshold logic gates
(Wiley Open Access, 2009)
A novel realisation of inverted majority gates based on a programmable MOS-NDR device is presented. A comparison, in terms ... |
Article
Operation limits for RTD-based MOBILE circuits
(IEEE, 2009)
Resonant-tunneling-diode (RTD)-based monostable-bistable logic element (MOBILE) circuits operate properly in a certain ... |
Presentation
RTD based logic circuits using generalized threshold gates
(2008)
Many logic circuit applications of Resonant Tunneling Diodes are based on the MOnostable-BIstable Logic Element (MOBILE). ... |
Presentation
Using multi-threshold threshold gates in rtd-based logic design. A case study
(Laboratoire TIMA, 2007)
The basic building blocks for Resonant Tunnelling Diode (RTD) logic circuits are Threshold Gates (TGs) instead of the ... |
Presentation
Holding Dissapearance in RTD-based Quantizers
(Laboratoire TIMA, 2007)
Multiple-valued Logic (MVL) circuits are one of the most attractive applications of the Monostable-to-Multistable transition ... |
PhD Thesis |
Article
COPAS: A New Algorithm for the Partial Input Encoding Problem
(Hindawi Publishing Corporation, 2002)
Frequently, the logic designer deals with functions with symbolic input variables. The binary encoding of such symbols ... |
PhD Thesis |
Article
Efficient realization of a threshold voter for self-purging redundancy
(Springer, 2001)
The self-purging technique is not commonly used mainly due to the lack of practical implementations of its key component, ... |
Article
A practical floating-gate Muller-C element using vMOS threshold gates
(Institute of Electrical and Electronics Engineers, 2001)
This paper presents the rationale for vMOS-based realizations of digital circuits when logic design techniques based on ... |
Article
nu MOS-based sorter for arithmetic applications
(Hindawi Publishing Corporation, 2000)
The capabilities of the conceptual link between threshold gates and sorting networks are explored by implementing some ... |
Article
Sorting networks implemented as νMOS circuits
(Institute of Electrical and Electronics Engineers, 1998)
A new realisation for n-input sorters is presented. Resorting to the neuron-MOS (νMOS) concept and to an adequate electrical scheme, a compact and efficient implementation is obtained. |
Article
State merging and state splitting via state assignment: a new FSM synthesis algorithm
(Institute of Electrical and Electronics Engineers, 1994)
The authors describe a state assignment algorithm for FSMs which produces an assignment of non-necessarily distinct, and ... |
Article
Efficient state reduction methods for PLA-based sequential circuits
(Institute of Electrical and Electronics Engineers, 1992)
Experiences with heuristics for the state reduction of finite-state machines are presented and two new heuristic algorithms ... |
PhD Thesis
Una aproximación al diseño óptimo de máquinas de estados finitos
(1992)
En los Capítulos 2 y 3 se aborda el diseño lógico FSMs. En el primero de ellos estudiamos el problema de la reducción del ... |