Perfil del autor: Paz Vicente, Rafael
Datos institucionales
| Nombre | Paz Vicente, Rafael |
| Departamento | Arquitectura y Tecnología de Computadores |
| Área de conocimiento | Arquitectura y Tecnología de Computadores |
| Categoría profesional | Profesor Contratado Doctor |
| Correo electrónico | Solicitar |
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Estadísticas
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Nº publicaciones
54
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Nº visitas
4643
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Nº descargas
6533
| Publicaciones |
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Artículo
 Real-time neuro-inspired sound source localization and tracking architecture applied to a robotic platform
(Elsevier, 2018)
This paper proposes a real-time sound source localization and tracking architecture based on the abilityof the mammalian ... |
Ponencia
Sound Recognition System Using Spiking and MLP Neural Networks
(Springer, 2016)
In this paper, we explore the capabilities of a sound classification system that combines a Neuromorphic Auditory System ... |
Ponencia
Musical notes classification with Neuromorphic Auditory System using FPGA and a Convolutional Spiking Network
(IEEE Computer Society, 2015)
In this paper, we explore the capabilities of a sound classification system that combines both a novel FPGA cochlear model ... |
Ponencia
Aprendizaje progresivo basado en proyectos en el ámbito de la Ingeniería Biomédica: diseño, construcción y programación de un ECG basado en un microcontrolador de bajo coste
(Asociación de Enseñantes Universitarios de la Informática (AENUI), 2014)
En la coyuntura sanitaria y educacional en la que se encuentra la sociedad desde hace unos años, el Cam pus de Excelencia ... |
Ponencia
Aprendizaje Basado en Proyectos: Implementación de Interfaces Gráficas para microcontroladores ARM
(Asociación de Enseñantes Universitarios de la Informática (AENUI), 2014)
ste artículo presenta la metodología empleada para dotar a nuestros alumnos, alumnos de la asignatura Diseño con ... |
Ponencia
Spikes Monitors for FPGAs, an Experimental Comparative Study
(Springer, 2013)
In this paper we present and analyze two VHDL components for monitoring internal activity of spikes fired by silicon neurons ... |
| Artículo |
Ponencia
Proceso de enseñanza-aprendizaje de los fundamentos de programación mediante metodología ABP aplicando las herramientas ofrecidas por una plataforma de enseñanza virtual en cada fase del proceso
(Asociación de Enseñantes Universitarios de la Informática (AENUI), 2012)
En este artículo se presenta la metodología empleada en la formación de los alumnos del Grado en Ingeniería Química ... |
Artículo
Comparison between frame-constrained fix-pixel-value and frame-free spiking-dynamic-pixel convNets for visual processing
(Frontiers Media, 2012)
Most scene segmentation and categorization architectures for the extraction of features in images and patches make exhaustive ... |
Ponencia
Live Demonstration: On the distance estimation of moving targets with a Stereo-Vision AER system
(IEEE Computer Society, 2012)
Distance calculation is always one of the most important goals in a digital stereoscopic vision system. In an AER system ... |
Ponencia
Image matching algorithms in stereo vision using address-event- representation: a theoretical study and evaluation of the different algorithms
(SciTePress, 2011)
Image processing in digital computer systems usually considers the visual information as a sequence of frames. These frames ... |
Ponencia
On the Designing of Spikes Band-Pass Filters for FPGA
(Springer, 2011)
In this paper we present two implementations of spike-based bandpass filters, which are able to reject out-of-band frequency ... |
Ponencia
Entrenamiento de la creatividad y la innovación en la ingeniería de computadores basándose en la metodología de aprendizaje por proyectos
(AENUI: Asociación de Enseñantes Universitarios de Informática, 2011)
En los estudios de Ingeniería normalmente se instruye en competencias sobre diseño, en las que es fundamental conocer las ... |
Ponencia
Práctica de desarrollo de interfaces hardware/software para el manejo de sensores de redes inalámbricas
(AENUI: Asociación de Enseñantes Universitarios de Informática, 2011)
En este artículo se describe una práctica de laboratorio en la que se ilustran los mecanismos necesarios para implementar ... |
Ponencia
Sistema de co-diseño hardware/software basado en FPGA para la captura de video analógico a través del bus serie USB
(AENUI: Asociación de Enseñantes Universitarios de Informática, 2011)
Con la adaptación del Espacio Europeo de Educación Superior (EEES) y la creación de los nuevo títulos de grado, se plantea ... |
Ponencia
Technical viability study for behavioral monitoring of wildlife animals in Doñana: An 802.15.4 coverage study in a Natural Park
(IEEE Computer Society, 2011)
The study and monitoring of wildlife and in semi-freedom has always been a subject of great interest. In recent years the ... |
Ponencia
Simulating Building Blocks for Spikes Signals Processing
(Springer, 2011)
In this paper we will explain in depth how we have used Simulink with the addition of Xilinx System Generation to design ... |
Ponencia
An AER to CAN Bridge for Spike-Based Robot Control
(Springer, 2011)
Address-Event-Representation (AER) is a bio-inspired communication protocol between chips. A set of AER sensors (retina ... |
Ponencia
An Approach to Distance Estimation with Stereo Vision Using Address-Event-Representation
(Springer, 2011)
Image processing in digital computer systems usually considers the visual information as a sequence of frames. These frames ... |
Ponencia
Práctica de laboratorio sobre implementación joystick HID-USB de interfaz con una emisora RC
(AENUI: Asociación de Enseñantes Universitarios de Informática, 2011)
Actualmente, la interconexión de cualquier tipo de periférico con un ordenador se realiza utilizando el bus USB. Dentro ... |
Ponencia
A perfomance comparison study between synchronous and asynchronous FPGA for spike based systems. Under the AER synthetic generation
(IEEE Computer Society, 2011)
Neuromorphic engineering tries to mimic biology in information processing. Address-Event Representation (AER) is a ... |
Ponencia
Building Blocks for Spikes Signals Processing
(IEEE Computer Society, 2010)
Neuromorphic engineers study models and implementations of systems that mimic neurons behavior in the brain. Neuro-inspired ... |
Ponencia
On the AER Convolution Processors for FPGA
(IEEE Computer Society, 2010)
Image convolution operations in digital computer systems are usually very expensive operations in terms of resource ... |
Ponencia
Neuro-inspired system for real-time vision sensor tilt correction
(IEEE Computer Society, 2010)
Neuromorphic engineering tries to mimic biological information processing. Address-Event-Representation (AER) is an ... |
Ponencia
Live demonstration: Neuro-inspired system for realtime vision tilt correction
(IEEE Computer Society, 2010)
Correcting digital images tilt needs huge quantities of memory, high computational resources, and use to take a considerable ... |
Ponencia
FPGA Implementations Comparison of Neuro-cortical Inspired Convolution Processors for Spiking Systems
(Springer, 2009)
Image convolution operations in digital computer systems are usually very expensive operations in terms of resource ... |
Ponencia
Synthetic retina for AER systems development
(IEEE Computer Society, 2009)
Neuromorphic engineering tries to mimic biology in information processing. Address-Event Representation (AER) is a ... |
Artículo
CAVIAR: A 45k neuron, 5M synapse, 12G connects/s AER hardware sensory-processing-learning-actuating system for high-speed visual object recognition and tracking
(Institute of Electrical and Electronics Engineers, 2009)
This paper describes CAVIAR, a massively parallel hardware implementation of a spike-based sensing-processing-learning-actuating ... |
Ponencia
Spike-based control monitoring and analysis with Address Event Representation
(IEEE Computer Society, 2009)
Neuromorphic engineering tries to mimic biological information processing. Address-Event Representation (AER) is a ... |
Ponencia
From Vision Sensor to Actuators, Spike Based Robot Control through Address-Event-Representation
(Springer, 2009)
One field of the neuroscience is the neuroinformatic whose aim is to develop auto-reconfigurable systems that mimic the ... |
Ponencia
Neuro-Inspired Real-Time USB & PCI to AER Interfaces for Vision Processing
(IEEE, 2008)
Address-Event-Representation (AER) is an emergent neuromorphic interchip communication protocol that allows for real-time ... |
Ponencia
AER and dynamic systems co-simulation over Simulink with Xilinx System Generator
(IEEE Computer Society, 2008)
Address-Event Representation (AER) is a neuromorphic communication protocol for transferring information of spiking neurons ... |
| Tesis Doctoral |
Ponencia
AER-based robotic closed-loop control system
(IEEE Computer Society, 2008)
Address-Event-Representation (AER) is an asynchronous protocol for transferring the information of spiking neuro-inspired ... |
Ponencia
Image convolution using a probabilistic mapper on USB-AER board
(IEEE Computer Society, 2008)
In this demo we propose a method for computing real time convolution on AER images. For that we use signed events. The AER ... |
Ponencia
AER image filtering
(SPIE Digital LIbrary, 2007)
Address Event Representation (AER) is an emergent neuromorphic interchip communication protocol that allows realtime virtual ... |
Ponencia
An AER-Based Actuator Interface for Controlling an Anthropomorphic Robotic Hand
(Springer, 2007)
Bio-Inspired and Neuro-Inspired systems or circuits are a relatively novel approaches to solve real problems by mimicking ... |
Ponencia
LVDS Serial AER Link performance
(IEEE Computer Society, 2007)
Address-Event-Representation (AER) is a communication protocol for transferring asynchronous events between VLSI chips, ... |
Ponencia
A LVDS Serial AER Link
(IEEE Computer Society, 2007)
Address-Event-Representation (AER) is a communication protocol for transferring asynchronous events between VLSI chips, ... |
Ponencia
AER tools for Communications and Debugging
(IEEE Computer Society, 2006)
Address-event-representation (AER) is a communications protocol for transferring spikes between bio-inspired chips. Such ... |
Ponencia
High-speed image processing with AER-based components
(IEEE Computer Society, 2006)
A high speed sample image processing application using AER-based components is presented. The setup objective is to ... |
Ponencia
AER Neuro-Inspired interface to Anthropomorphic Robotic Hand
(IEEE Computer Society, 2006)
Address-Event-Representation (AER) is a communication protocol for transferring asynchronous events between VLSI chips, ... |
Ponencia
PCI-AER interface for Neuro-inspired Spiking Systems
(IEEE Computer Society, 2006)
Address event representation (AER) is a neuromorphic interchip communication protocol that allows for real-time connectivity ... |
Ponencia
PCI to AER Hardware/Software interface for Real- Time Vision processing
(IEEE, 2005)
In this paper we present a mechanism that allows the coprocessing of video in real-time based into Address-Event-Representation ... |
Ponencia
Time-Recovering PCI-AER interface for Bio-inspired Spiking Systems
(SPIE: The International Society for Optics and Photonics, 2005)
Address Event Representation (AER) is an emergent neuromorphic interchip communication protocol that allows for real-time ... |
Ponencia
AER Building Blocks for Multi-Layer Multi-Chip Neuromorphic Vision Systems
(Neural Information Processing Systems Foundation, 2005)
A 5-layer neuromorphic vision processor whose components communicate spike events asychronously using the ... |
Ponencia
Two Hardware Implementations of the Exhaustive Synthetic AER Generation Method
(Springer, 2005)
Address-Event-Representation (AER) is a communications protocol for transferring images between chips, originally developed ... |
Ponencia
Test Infrastructure for Address-Event-Representation Communications
(Springer, 2005)
Address-Event-Representation (AER) is a communication protocol for transferring spikes between bio-inspired chips. Such ... |
Ponencia
Tools for Address-Event-Representation Communication Systems and Debugging
(Springer, 2005)
Address-Event-Representation (AER) is a communications protocol for transferring spikes between bio-inspired chips. Such ... |
Ponencia
Software Generation of Address-Event-Representation for Interchip Images Communications
(IEEE, 2002)
Address-Event-Representation (AER) is a communications protocol for transferring images between chips, originally developed ... |
Ponencia
Nexus, una herramienta de teleformación orientada a discapacitados
(Dirección General de la AUIP, 2002)
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Ponencia
Un simulador de memorias cache multinivel
(Universidad de las Islas Baleares, Servicio de Publicaciones, 2001)
En este trabajo, se describe un simulador gráfico denominado Simula Cache 1.0, que facilita la realización de prácticas ... |
Ponencia
Nexus: una herramienta de teleformación orientada a discapacitados
(Dirección General de la AUIP, 2001)
Las nuevas tecnologías de las comunicaciones están alcanzando poco a poco el campo de la educación a distancia. Se están ... |
Ponencia
Análisis a Bajo Nivel de Procesadores Superescalares Reales
(Universidad de Alcalá de Henares. Servicio de Publicaciones, 2000)
En esta ponencia-demo se presenta una práctica donde se analiza la influencia en el tiempo de ejecución de algunas ... |