Repositorio de producción científica de la Universidad de Sevilla

FPGA implementation of an embedded face detection system based on LEON3

 

Advanced Search
 
Opened Access FPGA implementation of an embedded face detection system based on LEON3
Cites
Show item statistics
Icon
Export to
Author: Acasandrei, Laurentiu
Barriga Barros, Ángel
Department: Universidad de Sevilla. Departamento de Electrónica y Electromagnetismo
Date: 2012
Published in: FPGA implementation of an embedded face detection system based on LEON3 (2012), p 1-6
Document type: Presentation
Abstract: This paper presents an FPGA face detection embedded system. In order achieve acceleration in the face detection process a hardware-software codesign technique is proposed. The paper describes the face detection acceleration mechanism. It also describes the implementation of an IP module that allows hardware acceleration.
Cite: Acasandrei, L. y Barriga Barros, Á. (2012). FPGA implementation of an embedded face detection system based on LEON3. En FPGA implementation of an embedded face detection system based on LEON3, Las Vegas (USA).
Size: 534.7Kb
Format: PDF

URI: https://hdl.handle.net/11441/79546

See editor´s version

This work is under a Creative Commons License: 
Attribution-NonCommercial-NoDerivatives 4.0 Internacional

This item appears in the following Collection(s)