Repositorio de producción científica de la Universidad de Sevilla

Fourth-order cascade SC ΣΔ modulators: a comparative study

 

Advanced Search
 
Opened Access Fourth-order cascade SC ΣΔ modulators: a comparative study
Cites

Show item statistics
Icon
Export to
Author: Medeiro Hidalgo, Fernando
Pérez Verdú, Belén
Rosa Utrera, José Manuel de la
Rodríguez Vázquez, Ángel Benito
Department: Universidad de Sevilla. Departamento de Electrónica y Electromagnetismo
Date: 1998
Published in: IEEE Transactions on Circuits and Systems I: Fundamental Theory and Applications, 45 (10), 1041-1051.
Document type: Article
Abstract: Fourth-order cascade ΣΔ modulators are very well suited for IC implementation using analog sampled-data circuits because of their robust, stable operation and their capability to achieve high resolution and wide bandwidth with moderate power consumption. However, their optimum realization requires careful consideration of their performance degradations due to the hardware nonidealities. This paper presents a comparative study of the influence of finite op-amp gain and capacitor mismatch on the performance of fourth-order cascade ΣΔ modulators realized by means of switched-capacitor circuits. It considers single-bit and multibit quantizers and draws a number of comparative remarks validated by time-domain behavioral simulations.
Cite: Medeiro Hidalgo, F., Pérez Verdú, B., Rosa Utrera, J.M.d.l. y Rodríguez Vázquez, Á.B. (1998). Fourth-order cascade SC ΣΔ modulators: a comparative study. IEEE Transactions on Circuits and Systems I: Fundamental Theory and Applications, 45 (10), 1041-1051.
Size: 388.5Kb
Format: PDF

URI: https://hdl.handle.net/11441/78366

DOI: 10.1109/81.728858

See editor´s version

This work is under a Creative Commons License: 
Attribution-NonCommercial-NoDerivatives 4.0 Internacional

This item appears in the following Collection(s)