Opened Access 1 V CMOS subthreshold log domain PDM
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Author: Serra Graells, Francesc
Huertas Díaz, José Luis
Date: 2003
Published in: Analog Integrated Circuits and Signal Processing, 34 (3), 183-187.
Document type: Article
Abstract: A new CMOS circuit strategy for very low-voltage Pulse-Duration Modulators (PDM) is proposed. Optimization of voltage supply scaling below the sum of threshold voltages is based on Instantaneous Log Companding processing through the MOSFET operating in weak inversion. A 1 V VLSI PDM circuit for very low-voltage audio applications such as Hearing Aids is presented, showing good agreement between simulated and experimental data.
Cite: Serra Graells, F. y Huertas Díaz, J.L. (2003). 1 V CMOS subthreshold log domain PDM. Analog Integrated Circuits and Signal Processing, 34 (3), 183-187.
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URI: https://hdl.handle.net/11441/77207

DOI: 10.1023/A:1022545414777

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