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Digital test for the extraction of integrator leakage in first- and second-order ΣΔ modulators

 

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Opened Access Digital test for the extraction of integrator leakage in first- and second-order ΣΔ modulators
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Author: Léger, Gildas
Rueda Rueda, Adoración
Department: Universidad de Sevilla. Departamento de Electrónica y Electromagnetismo
Date: 2004
Published in: IEE Proceedings Circuits, Devices and Systems, 151 (4), 349-358.
Document type: Article
Abstract: This paper proposes a digital technique to evaluate the integrator leakage within 1st and 2nd order ΣΔ modulators. Integrator leakage is known to be related to the converter precision and belongs to the basic set of design specifications. The technique proposed here involves very few hardware, which makes it specially suitable for Built-In Self-Test (BIST) implementation. Moreover, the integrator leakage evaluation allows its digital correction in cascaded modulators.
Cite: Léger, G. y Rueda Rueda, A. (2004). Digital test for the extraction of integrator leakage in first- and second-order ΣΔ modulators. IEE Proceedings Circuits, Devices and Systems, 151 (4), 349-358.
Size: 666.5Kb
Format: PDF

URI: https://hdl.handle.net/11441/77103

DOI: 10.1049/ip-cds:20040558(410)%20151

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