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A modular T-mode design approach for analog neural network hardware implementations

 

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Author: Linares Barranco, Bernabé
Sánchez Sinencio, Edgar
Rodríguez Vázquez, Ángel Benito
Huertas Díaz, José Luis
Department: Universidad de Sevilla. Departamento de Electrónica y Electromagnetismo
Date: 1992
Published in: IEEE Journal of Solid-State Circuits, 27 (5), 701-713.
Document type: Article
Abstract: A modular transconductance-mode (T-mode) design approach is presented for analog hardware implementations of neural networks. This design approach is used to build a modular bidirectional associative memory network. The authors show that the size of the whole system can be increased by interconnecting more modular chips. It is also shown that by changing the interconnection strategy different neural network systems can be implemented, such as a Hopfield network, a winner-take-all network, a simplified ART1 network, or a constrained optimization network. Experimentally measured results from CMOS 2-μm double-metal, double-polysilicon prototypes (MOSIS) are presented.
Cite: Linares Barranco, B., Sánchez Sinencio, E., Rodríguez Vázquez, Á.B. y Huertas Díaz, J.L. (1992). A modular T-mode design approach for analog neural network hardware implementations. IEEE Journal of Solid-State Circuits, 27 (5), 701-713.
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URI: https://hdl.handle.net/11441/76572

DOI: 10.1109/4.133157

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