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AER image filtering architecture for vision-processing systems

 

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Author: Serrano Gotarredona, María Teresa
Andreou, Andreas G.
Linares Barranco, Bernabé
Department: Universidad de Sevilla. Departamento de Arquitectura y Tecnología de Computadores
Date: 1999
Published in: IEEE Transactions on Circuits and Systems I - Fundamental Theory and Applications, 46 (9), 1064-1071.
Document type: Article
Abstract: A VLSI architecture is proposed for the realization of real-time two-dimensional (2-D) image filtering in an address-event-representation (AER) vision system. The architecture is capable of implementing any convolutional kernel F(x,y) as long as it is decomposable into x-axis and y-axis components, i.e., F(x, y) = H(x)V(y), for some rotated coordinate system {x, y} and if this product can be approximated safely by a signed minimum operation. The proposed architecture is intended to be used in a complete vision system, known as the boundary contour system and feature contour system (BCS-FCS) vision model, proposed by Grossberg and collaborators. The present paper proposes the architecture, provides a circuit implementation using MOS transistors operated in weak inversion, and shows behavioral simulation results at the system level operation and some electrical simulations.
Cite: Serrano Gotarredona, M.T., Andreou, A.G. y Linares Barranco, B. (1999). AER image filtering architecture for vision-processing systems. IEEE Transactions on Circuits and Systems I - Fundamental Theory and Applications, 46 (9), 1064-1071.
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URI: https://hdl.handle.net/11441/76405

DOI: 10.1109/81.788808

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