Power and timing modelling, optimisation and simulation

dc.creator	Juan Chico, Jorge	es
dc.creator	Soudris, D.	es
dc.creator	Macii, E.	es
dc.date.accessioned	2018-06-13T12:55:11Z
dc.date.available	2018-06-13T12:55:11Z
dc.date.issued	2005
dc.identifier.citation	Juan Chico, J., Soudris, D. y Macii, E. (2005). Power and timing modelling, optimisation and simulation. IEE Proceedings Computers and Digital Techniques, 152 (6), 721-722.
dc.identifier.issn	1350-2387	es
dc.identifier.uri	https://hdl.handle.net/11441/76152
dc.format	application/pdf	es
dc.language.iso	eng	es
dc.publisher	Institute of Electrical and Electronics Engineers	es
dc.relation.ispartof	IEE Proceedings Computers and Digital Techniques, 152 (6), 721-722.
dc.rights	Attribution-NonCommercial-NoDerivatives 4.0 Internacional	*
dc.rights.uri	http://creativecommons.org/licenses/by-nc-nd/4.0/	*
dc.title	Power and timing modelling, optimisation and simulation	es
dc.type	info:eu-repo/semantics/article	es
dcterms.identifier	https://ror.org/03yxnpp24
dc.type.version	info:eu-repo/semantics/acceptedVersion	es
dc.rights.accessRights	info:eu-repo/semantics/openAccess	es
dc.relation.publisherversion	http://dx.doi.org/10.1049/ip-cdt:20059075	es
dc.identifier.doi	10.1049/ip-cdt:20059075	es
idus.format.extent	2 p.	es
dc.journaltitle	IEE Proceedings Computers and Digital Techniques	es
dc.publication.volumen	152	es
dc.publication.issue	6	es
dc.publication.initialPage	721	es
dc.publication.endPage	722	es

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